High temperature submicron SOI CMOS technology characterization for analog and digital applications up to 300°C

Author(s):  
Konstantin O. Petrosyants ◽  
Sergey V. Lebedev ◽  
Lev M. Sambursky ◽  
Veniamin G. Stakhin ◽  
Igor A. Kharitonov ◽  
...  
2010 ◽  
Vol 41 (9) ◽  
pp. 540-546 ◽  
Author(s):  
S. Santra ◽  
F. Udrea ◽  
P.K. Guha ◽  
S.Z. Ali ◽  
I. Haneef

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000227-000232
Author(s):  
K. Grella ◽  
S. Dreiner ◽  
A. Schmidt ◽  
W. Heiermann ◽  
H. Kappert ◽  
...  

Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. Silicon-on-Insulator-technologies are commonly used up to 250 °C. In this work we evaluate the limit for electronic circuit function realized in thin film SOI-technologies for even higher temperatures. At Fraunhofer IMS a versatile 1.0 μm SOI-CMOS process based on 200 mm wafers is available. It features three layers of tungsten metalization with excellent reliability concerning electromigration, voltage independent capacitors, various resistors, and single-poly-EEPROMs. We present a study of the temperature dependence of MOSFETs and basic circuits produced in this process. The electrical characteristics of NMOSFET- and PMOSFET-transistors were studied up to 450 °C. In a second step we investigated the functionality of ring oscillators, representing digital circuits, and bandgap references as examples of simple analog components. The frequency and the current consumption of ring oscillators and the output voltage of bandgap references were also characterized up to 450 °C. We found that the ring oscillator still functions at this high temperature with a frequency of about one third of the value at room temperature. The output voltage of the bandgap reference is in the specified range up to 250 °C. The deviations above this temperature are analyzed and measures to improve the circuit are discussed. The acquired data provide an important foundation to extend the application of CMOS-technology to its real maximum temperature limits.


1997 ◽  
Vol 46 (1-3) ◽  
pp. 1-7 ◽  
Author(s):  
B. Gentinne ◽  
J.-P. Eggermont ◽  
D. Flandre ◽  
J.-P. Colinge

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000243-000250 ◽  
Author(s):  
E. Boufouss ◽  
L. A. Francis ◽  
P. Gérard ◽  
M. Assaad ◽  
D. Flandre

We present three ultra-low-power CMOS circuits: a temperature sensor, a voltage reference and a comparator developed for an ultra-low-power microsystem (ULP-MST) aiming at temperature sensing in harsh environments. The microsystem has 3 main functions: detecting a user-defined temperature threshold T0, generating a wake-up signal that turns on a data-acquisition microprocessor (located in a safe area) above T0, and measuring temperatures above T0. To achieve ultra-low-power operation, the three CMOS circuits are implemented in Silicon-on-Insulator (SOI) CMOS technology and are optimized to work in the subthreshold regime of the transistors. Since our application is mainly for harsh environment (i.e. high temperature and radiation), the chip has been designed using a suitable 1-μm SOI-CMOS technology. Simulations have been performed over the different process corners to verify functionality after fabrication. The typical power dissipation at high temperature (up to 240°C) is less than 100 μW at 5 V supply voltage. Measurements have validated correct operation in the temperature range from −40°C to 300°C before radiation and to 125°C after radiation up to now which will be extended further with a new set-up. Irradiation has been performed from 10 to 30 kGy. Such very high doses cause a shift down of output voltage values, which leads to a change of the temperature detection level and also increases the power dissipation by up to six times. Annealing effects help the partial recovery of the device operation at high temperature and the remote microprocessor enables calibration after radiation to readjust the temperature detection level.


2013 ◽  
Vol 10 (2) ◽  
pp. 67-72 ◽  
Author(s):  
K. Grella ◽  
S. Dreiner ◽  
A. Schmidt ◽  
W. Heiermann ◽  
H. Kappert ◽  
...  

Standard bulk CMOS technology targets operating temperatures of not more than 175°C. Silicon-on-insulator technologies are commonly used up to 250°C. In this work, we evaluate the limit for electronic circuit function realized in thin film SOI technologies for even higher temperatures. At Fraunhofer IMS, a versatile 1.0 μm SOI-CMOS process based on 200 mm wafers is available. It features three layers of tungsten metallization with excellent reliability concerning electromigration, as well as voltage-independent capacitors, various resistors, and single-poly-EEPROMs. We present a study of the temperature dependence of MOSFETs and basic circuits produced in this process. The electrical characteristics of an NMOSFET transistor and a PMOSFET transistor are studied up to 450°C. In a second step, we investigate the functionality of a ring oscillator (representing a digital circuit) and a band gap reference as an example of a simple analog component. The frequency and the current consumption of the ring oscillator, as well as the output voltage and the current of the band gap reference, are characterized up to 450°C. We find that the ring oscillator still oscillates at this high temperature with a frequency of about one third of the value at room temperature. The output voltage of the band gap reference is in the specified range (change < 3%) up to 250°C. The deviations above this temperature are analyzed and measures to improve the circuit are discussed. The acquired data provide an important foundation to extend the application of CMOS technology to its real maximum temperature limits.


2001 ◽  
Vol 45 (4) ◽  
pp. 541-549 ◽  
Author(s):  
D Flandre ◽  
S Adriaensen ◽  
A Akheyar ◽  
A Crahay ◽  
L Demeûs ◽  
...  

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000112-000115
Author(s):  
Holger Kappert ◽  
Sebastian Braun ◽  
Norbert Kordas ◽  
Stefan Dreiner ◽  
Rainer Kokozinski

Abstract Power electronics is a rapidly developing application area for high temperature electronics. Wide bandgap semiconductors have intrinsic advantages for high temperature operation due to the large bandgap in comparison to silicon based semiconductors. Especially GaN is a promising material for power semiconductors due to the possibility to process GaN on silicon carrier wafers, which results in lower device costs in comparison to SiC. In addition GaN provides higher switching frequencies and lower on-resistances of power devices. In combination these advantages enable the design of high performing, small size power modules operating at elevated temperatures. However, in order to exploit all benefits from GaN technology, new approaches in driver design are necessary. In this work a GaN specific gate driver supporting increased switching frequency, low driver output resistance, and GaN specific control voltages is presented. The driver has been implemented in a 0.35 micron thin film SOI-CMOS technology allowing high temperature operation up to 250 °C. The driver output characteristic is digitally adjustable with configuration data stored in an on-chip non-volatile memory based on EEPROM.


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