High Temperature Characterization up to 450 °C of MOSFETs and basic circuits realized in a Silicon-on-Insulator (SOI) CMOS-Technology

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000227-000232
Author(s):  
K. Grella ◽  
S. Dreiner ◽  
A. Schmidt ◽  
W. Heiermann ◽  
H. Kappert ◽  
...  
Keyword(s):  
High Temperature ◽  
Output Voltage ◽  
Cmos Technology ◽  
Silicon On Insulator ◽  
Ring Oscillator ◽  
Maximum Temperature ◽  
Cmos Process ◽  
Ring Oscillators ◽  
Circuit Function ◽  
Soi Cmos

Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. Silicon-on-Insulator-technologies are commonly used up to 250 °C. In this work we evaluate the limit for electronic circuit function realized in thin film SOI-technologies for even higher temperatures. At Fraunhofer IMS a versatile 1.0 μm SOI-CMOS process based on 200 mm wafers is available. It features three layers of tungsten metalization with excellent reliability concerning electromigration, voltage independent capacitors, various resistors, and single-poly-EEPROMs. We present a study of the temperature dependence of MOSFETs and basic circuits produced in this process. The electrical characteristics of NMOSFET- and PMOSFET-transistors were studied up to 450 °C. In a second step we investigated the functionality of ring oscillators, representing digital circuits, and bandgap references as examples of simple analog components. The frequency and the current consumption of ring oscillators and the output voltage of bandgap references were also characterized up to 450 °C. We found that the ring oscillator still functions at this high temperature with a frequency of about one third of the value at room temperature. The output voltage of the bandgap reference is in the specified range up to 250 °C. The deviations above this temperature are analyzed and measures to improve the circuit are discussed. The acquired data provide an important foundation to extend the application of CMOS-technology to its real maximum temperature limits.

High Temperature Characterization up to 450°C of MOSFETs and Basic Circuits Realized in a Silicon-on-Insulator (SOI) CMOS Technology

2013 ◽  
Vol 10 (2) ◽  
pp. 67-72 ◽  
Author(s):  
K. Grella ◽  
S. Dreiner ◽  
A. Schmidt ◽  
W. Heiermann ◽  
H. Kappert ◽  
...  
Keyword(s):  
High Temperature ◽  
Band Gap ◽  
Output Voltage ◽  
Cmos Technology ◽  
Digital Circuit ◽  
Silicon On Insulator ◽  
Ring Oscillator ◽  
Maximum Temperature ◽  
Cmos Process ◽  
Soi Cmos

Standard bulk CMOS technology targets operating temperatures of not more than 175°C. Silicon-on-insulator technologies are commonly used up to 250°C. In this work, we evaluate the limit for electronic circuit function realized in thin film SOI technologies for even higher temperatures. At Fraunhofer IMS, a versatile 1.0 μm SOI-CMOS process based on 200 mm wafers is available. It features three layers of tungsten metallization with excellent reliability concerning electromigration, as well as voltage-independent capacitors, various resistors, and single-poly-EEPROMs. We present a study of the temperature dependence of MOSFETs and basic circuits produced in this process. The electrical characteristics of an NMOSFET transistor and a PMOSFET transistor are studied up to 450°C. In a second step, we investigate the functionality of a ring oscillator (representing a digital circuit) and a band gap reference as an example of a simple analog component. The frequency and the current consumption of the ring oscillator, as well as the output voltage and the current of the band gap reference, are characterized up to 450°C. We find that the ring oscillator still oscillates at this high temperature with a frequency of about one third of the value at room temperature. The output voltage of the band gap reference is in the specified range (change < 3%) up to 250°C. The deviations above this temperature are analyzed and measures to improve the circuit are discussed. The acquired data provide an important foundation to extend the application of CMOS technology to its real maximum temperature limits.

High Temperature Reliability Investigations up to 350 °C of Gate Oxide Capacitors realized in a Silicon-on-Insulator CMOS-Technology

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000116-000121
Author(s):  
K. Grella ◽  
S. Dreiner ◽  
H. Vogt ◽  
U. Paschen
Keyword(s):  
High Temperature ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Cmos Technology ◽  
Silicon On Insulator ◽  
Cmos Process ◽  
Oxide Breakdown ◽  
Time Dependent Dielectric Breakdown ◽  
Single Poly Eeprom

Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. With Silicon-on-Insulator-technologies (SOI), digital and analog circuitry is possible up to 250 °C and even more, but performance and reliability are strongly affected at these high temperatures. One of the main critical factors is the gate oxide quality and its reliability. In this paper, we present a study of gate oxide capacitor time-dependent dielectric breakdown (TDDB) measurements at temperatures up to 350 °C. The experiments were carried out on gate oxide capacitor structures which were realized in the Fraunhofer 1.0 μm SOI-CMOS process. This technology is based on 200 mm wafers and features, among others, three layers of tungsten metallization with excellent reliability concerning electromigration, voltage independent capacitors, high resistance resistors, and single-poly-EEPROM cells. The gate oxide thickness is 40 nm. Using the data of the TDDB-measurements, the behavior of field and temperature acceleration parameters at temperatures up to 350 °C was evaluated. For a more detailed investigation, the current evolution in time was also studied. An analysis of the oxide breakdown conditions, in particular the field and temperature dependence of the charge to breakdown and the current just before breakdown, completes the study. The presented data provide important information about accelerated oxide reliability testing beyond 250 °C, and make it possible to quickly evaluate the reliability of high temperature CMOS-technologies at use-temperature.

Comparison of a Current Mode Reference Generator vs.a ΔVBE Bandgap Circuit in a 1.0μm Partially-Depleted Silicon-On-Insulator CMOS Process for High Temperature (220 °C) Environments

2017 ◽  
Vol 2017 (HiTEN) ◽  
pp. 000234-000237
Author(s):  
Alex Pike ◽  
Adrien Corne ◽  
Frank Bohac ◽  
Ravi Ananth
Keyword(s):  
High Temperature ◽  
High Temperatures ◽  
Wide Temperature Range ◽  
Output Voltage ◽  
Current Mode ◽  
Silicon On Insulator ◽  
The Other ◽  
Cmos Process ◽  
Reference Generator ◽  
A Current

Abstract Two different reference generator circuits were designed, fabricated and tested, on the same silicon die using a 1.0μ CMOS SOI process that is suitable for operation at high temperatures. One of the reference generators was a traditional bandgap circuit. The other was a more novel current-mode reference that can notionally generate any output voltage. Testing was performed over a wide temperature range from −50°C to 220°C with a supply variation of 4V to 6V.

A 31 GHz body-biased configurable power amplifier in 28 nm FD-SOI CMOS for 5 G applications

2020 ◽  
pp. 1-18
Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos
Keyword(s):  
Power Amplifier ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Technology ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Fully Depleted ◽  
Technology Roadmap ◽  
Wide Range ◽  
28 Nm ◽  
Soi Cmos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.

High Temperature Analog-to-Digital Converter Reliability Testing

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000245-000252 ◽  
Author(s):  
Bruce W. Ohme ◽  
Mark R. Larson
Keyword(s):  
High Temperature ◽  
Silicon On Insulator ◽  
Cmos Process ◽  
Reliability Testing ◽  
Test Results ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Life Test ◽  
Analog To Digital ◽  
Post Stress

Initial test results have been previously reported for a high-temperature (225°C) 12-bit analog-to-digital converter (HTADC12) fabricated using a production high-temperature silicon-on-insulator (SOI) CMOS process and assembled in hermetically sealed ceramic packages (ref. 1). Reliability test results for the HTADC12 are presented including parametric and functional test results from 1500 hours of dynamic life test at 250°C as well 1000 temperature cycles from −65°C to 200°C. Results of post-stress wirebond, and die bond testing are also provided.

Ultra-high temperature (>300°C) suspended thermodiode in SOI CMOS technology

2010 ◽  
Vol 41 (9) ◽  
pp. 540-546 ◽  
Author(s):  
S. Santra ◽  
F. Udrea ◽  
P.K. Guha ◽  
S.Z. Ali ◽  
I. Haneef
Keyword(s):  
High Temperature ◽  
Cmos Technology ◽  
Ultra High Temperature ◽  
Soi Cmos

High temperature anti short circuit function for normally-on SiC JFET in an inverter leg configuration

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000087-000092
Author(s):  
Khalil El Falahi ◽  
Luong Viêt Phung ◽  
Bruno Allard ◽  
Dominique Bergogne ◽  
Fabien Dubois
Keyword(s):  
High Temperature ◽  
Temperature Effects ◽  
Short Circuit ◽  
Hybrid Vehicle ◽  
Experimental Results ◽  
Output Current ◽  
Safety Function ◽  
Specific Safety ◽  
Circuit Function ◽  
Soi Cmos

The SiC JFET is commercially available as a normally-on device. In an inverter leg configuration, many temperature effects must be compensated. Moreover, specific safety functions have to be implemented and the JFET drivers are generally the best locations to implement latter requirements. The paper describes experimental results about a SOI CMOS core driver operated up to 250°C. Particularly, an option is presented to compensate for the decrease in the driver output current with temperature. It is also demonstrated primary results of the integration of an anti short-circuit solution previously verified as a hybrid vehicle. It is shown that the reactivity of the safety function is reduced to less than 5μs at 250°C compared to 100μs in earlier vehicle at 200°C.

High Temperature Reliability Investigations of EEPROM Memory Cells Realised in Silicon-on-Insulator (SOI) Technology

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000221-000225 ◽  
Author(s):  
K. Grella ◽  
H. Vogt ◽  
U. Paschen
Keyword(s):  
High Temperature ◽  
Data Storage ◽  
Oxide Thickness ◽  
Silicon On Insulator ◽  
Measurement Information ◽  
Cmos Process ◽  
High Temperature Electronics ◽  
Increasing Demand ◽  
Single Poly Eeprom ◽  
Application Fields

Microelectronic manufacturing progresses not only towards further miniaturisation, but also application fields tend to become more and more diverse. Recently there has been an increasing demand for electronic devices and circuits that function in harsh environments such as high temperatures. Under these conditions, reliability aspects are highly critical and testing remains a great challenge. A versatile CMOS process based on 200 mm thin film Silicon-on-Insulator (SOI) wafers is in production at Fraunhofer IMS. It features three layers of tungsten metallisation for optimum electromigration reliability, voltage independent capacitors, high resistance resistors and single-poly-EEPROM cells. Non-volatile memories such as EEPROMs are a key technology that enables flexible data storage, for example of calibration and measurement information. The reliability of these devices is especially crucial in high temperature applications since charge loss is drastically increased in this case. The behaviour of single-poly-EEPROM cells, produced in the process described before, was evaluated up to 450 °C. Data retention tests at temperatures ranging from 160 °C to 450 °C and write/erase cycling tests up to 400 °C were performed. The dependence of write/erase cycling on both temperature and tunnel oxide thickness was studied. These data provide an important foundation to extend the application of high temperature electronics to its maximum limits. The results show that EEPROM cells can be used for special applications even at temperatures higher than 250 °C.

Trends in Automotive Packaging

2014 ◽  
Vol 2014 (DPC) ◽  
pp. 001818-001850 ◽  
Author(s):  
Glenn G. Daves
Keyword(s):  
High Temperature ◽  
Aircraft Engine ◽  
Silicon On Insulator ◽  
Maximum Temperature ◽  
Automotive Electronics ◽  
Sensor Signal ◽  
Signal Conditioning ◽  
Crystal Oscillator ◽  
Term Operation ◽  
High Temperature Electronics

The long-term trend in automobiles has been increasing electronics content over time. This trend is expected to continue and drives diverse functional, form factor, and reliability requirements. These requirements, in turn, are leading to changes in the package types selected and the performance specifications of the packages used for automotive electronics. Several examples will be given. This abstract covers the development of a distributed high temperature electronics demonstrator for integration with sensor elements to provide digital outputs that can be used by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aircraft engine. This distributed electronics demonstrator eliminates the need for the FADEC or EHMS to process the sensor signal, which will assist in making the overall system more accurate and efficient in processing only digital signals. This will offer weight savings in cables, harnesses and connector pin reduction. The design concept was to take the output from several on-engine sensors, carry out the signal conditioning, multiplexing, analogue to digital conversion and data transmission through a serial data bus. The unit has to meet the environmental requirements of DO-160 with the need to operate at 200°C, with short term operation at temperatures up to 250°C. The work undertaken has been to design an ASIC based on 1.0 μm Silicon on Insulator (SOI) device technology incorporating sensor signal conditioning electronics for sensors including resistance temperature probes, strain gauges, thermocouples, torque and frequency inputs. The ASIC contains analogue multiplexers, temperature stable voltage band-gap reference and bias circuits, ADC, BIST, core logic, DIN inputs and two parallel ARINC 429 serial databuses. The ASIC was tested and showed to be functional up to a maximum temperature of 275°C. The ASIC has been integrated with other high temperature components including voltage regulators, a crystal oscillator, precision resistors, silicon capacitors within a hermetic hybrid package. The hybrid circuit has been assembled within a stainless steel enclosure with high temperature connectors. The high temperature electronics demonstrator has been demonstrated operating from −40°C to +250°C. This work has been carried out under the EU Clean Sky HIGHTECS project with the Project being led by Turbomeca (Fr) and carried out by GE Aviation Systems (UK), GE Research – Munich (D) and Oxford University (UK).

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