Experiment and Numerical Analysis of the Residual Stresses in Underfill Resins for Flip Chip Package Applications

2005 ◽  
Vol 127 (1) ◽  
pp. 47-51 ◽  
Author(s):  
Man-Lung Sham ◽  
Jang-Kyo Kim
Keyword(s):  
Numerical Analysis ◽  
Residual Stresses ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Flexural Modulus ◽  
Curing Temperature ◽  
Electronic Packages ◽  
Element Analysis ◽  
Plastic Package

Polymeric encapsulant is widely used to protect the integrated circuit chips and thus to enhance the reliability of electronic packages. Residual stresses are introduced in the plastic package when the polymer is cooled from the curing temperature to ambient, from which many reliability issues arise, including warpage of the package, premature interfacial failure, and degraded interconnections. Bimaterial strip bending experiment has been employed successfully to monitor the evolution of the residual stresses in underfrill resins for flip chip applications. A numerical analysis is developed to predict the residual stresses, which agree well with the experimental measurements. The changes of material properties, such as flexural modulus and coefficient of thermal expansion, of the resins with temperature are taken into account in the finite element analysis.

Effect of Thermal Residual Stresses on Polymer/Metal Interfacial Adhesion

1999 ◽  
Author(s):  
Qizhou Yao ◽  
Jianmin Qu
Keyword(s):  
Residual Stress ◽  
Residual Stresses ◽  
Coefficient Of Thermal Expansion ◽  
Interfacial Crack ◽  
Thermal Residual Stress ◽  
Element Analysis ◽  
Thermal Residual Stresses ◽  
Interfacial Cracks ◽  
Cte Mismatch ◽  
Elastic Mismatch

Abstract In this study, the apparent fracture toughness of the interfaces of several epoxy-based polymeric adhesives and metal (aluminum) substrate is experimentally measured. Double layer specimens with initial interfacial cracks are made for four-point bending tests. Thermal residual stresses exist on the interface due to the coefficient of thermal expansion (CTE) mismatch between the underfill and aluminum. Silica fillers are used to modify the CTE of the epoxy-based adhesives so that various levels of interface thermal residual stresses are achieved. Finite element analysis is also performed to quantify the effects of CTE mismatch as well as the elastic mismatch across the interface. It is found that the apparent interfacial toughness is significantly affected by the thermal residual stress, while the effect of elastic mismatch is negligible. In general thermal residual stress undermines the resistance to an interfacial crack. In some cases the residual stress is sufficient to result in adhesive and/or cohesive failure.

On the Multiscale Finite Element Analysis for Interfacial Fracture in Cu/Low-K Interconnects

2007 ◽  
Author(s):  
Tz-Cheng Chiu ◽  
Huang-Chun Lin
Keyword(s):  
Thin Film ◽  
Fracture Mechanics ◽  
Interface Crack ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Thermal Loading ◽  
Global Analysis ◽  
Crack Problem ◽  
Element Analysis ◽  
Low K

The interface crack problem in integrated circuit devices was considered by using global and local modeling approach. In the global analysis the thin film interconnect was modeled by a homogenized layer with material constants obtained from representative volume element (RVE) analysis. Local analyses were then considered to determine fracture mechanics parameters. It was shown that the multiscale model with RVE approach gives accurate fracture mechanics parameters for an interface crack under either thermal or mechanical loads; while significant error was observed when the thin film layers are ignored in the global analysis. The problem of an interface crack between low-k dielectric and etch-stop thin film in a flip-chip package under thermal loading was also investigated as an application example of the multiscale modeling.

Analysis of Stress Distribution in SnAgCu Solder Joint

2006 ◽  
Vol 5-6 ◽  
pp. 359-366 ◽  
Author(s):  
J. Gong ◽  
C. Liu ◽  
P.P. Conway ◽  
Vadim V. Silberschmidt
Keyword(s):  
Residual Stresses ◽  
Flip Chip ◽  
Solder Joints ◽  
Electronic Packages ◽  
Snagcu Solder ◽  
Snpb Solder ◽  
Creep Fatigue ◽  
Element Approach ◽  
Reliability Of Solder Joints ◽  
Free Material

SnAgCu solder is a promising lead-free material for interconnections in electronic packages. However, its melting temperature (490°K) is considerably higher than that of the traditional SnPb solder (456°K). At the same time, SnAgCu has much better creep resistance at high temperature. These properties may cause large residual stresses during manufacturing processes due to the mismatch of thermal properties of electronic components that can influence the reliability of solder joints in electronic packages. This paper studies the residual stresses in solder joints in a flip chip package under different cooling conditions and their influence on the subsequent cyclic test by means of a finite element approach. The results show that the initial temperature of 453°K is high enough to induce residual stresses due to manufacturing procedures. Simulations, based on traditional creep-fatigue models, demonstrate that the residual stresses affect the mechanical behaviour of solder joints in several initial thermal cycles but have little effect on their reliability.

Effect of Underfill Thermomechanical Properties on Thermal Cycling Fatigue Reliability of Flip-Chip Ball Grid Array

2004 ◽  
Vol 126 (4) ◽  
pp. 560-564 ◽  
Author(s):  
Tong Hong Wang ◽  
Yi-Shao Lai ◽  
Jenq-Dah Wu
Keyword(s):  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Ball Grid Array ◽  
Thermomechanical Properties ◽  
Creep Model ◽  
Fatigue Reliability ◽  
Element Analysis ◽  
Dimensional Finite Element ◽  
Real Behavior ◽  
Thermal Cycling Fatigue

Plane two-dimensional finite element analysis was applied to study the effect of underfill thermomechanical properties on the potential of thermal fatigue failure for flip-chip ball grid array. Two-stage as well as constant thermomechanical properties of underfills were manipulated to represent extremes of practical underfills. The steady-state creep model was incorporated for the eutectic solder bump to represent its real behavior. It was found from the parametric studies that the underfill with high Young’s modulus, low coefficient of thermal expansion, and high glass transition temperature leads to the longest service life.

Interactions between Variable Frequency Microwave Underfill Processing and High Performance Packaging Materials

2013 ◽  
Vol 2013 (1) ◽  
pp. 000461-000466 ◽  
Author(s):  
Mamadou Diobet Diop ◽  
Marie-Claude Paquet ◽  
Dominique Drouin ◽  
David Danovitch
Keyword(s):  
High Performance ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Curing Temperature ◽  
Variable Frequency ◽  
Asymmetric Distribution ◽  
Unexpected Result ◽  
Scanning Calorimetry ◽  
Negative Effect ◽  
Curing Methods

Variable frequency microwave (VFM) has been recently proposed as an alternative underfill curing method that provides flip chip package warpage improvement as well as potential underfill cure time reductions. The current paper outlines how such advantages in VFM processing of underfill can be compromised when applied to high performance organic packages. VFM recipes for three underfill materials were developed by performing several VFM curing runs followed by curing rate measurements using the differential scanning calorimetry method. The VFM curing rate was seen to strongly dependent upon the underfill chemistry. By testing flip chip parts that comprised large and high-end substrates, we showed that the underfill material has negligible impact on VFM warpage with the major cause attributed to the coefficient of thermal expansion mismatch between the die and the substrate. Comparison between the convection and the VFM methods indicated two warpage tendencies that depended upon the VFM curing temperature. First, when both curing methods used comparably high temperatures, warpage increases up to about + 20% were found with VFM. This unexpected result was explained by the high-density Cu loading of the substrate which systematically carried heat generated by VFM energy from the die/underfill system to the substrate. Since this high-end substrate consists of sequential dielectric/Cu layers with asymmetric distribution of Cu, additional stresses due to local CTE mismatches between the Cu and the dielectric layers were induced within the substrate processed with VFM. Second, warpage reductions down to about − 22% were obtained at the VFM curing temperature of 110°C with a curing time similar to that of convection cure. This suggests that the negative effect of the local CTE mismatches were no longer at play at the lower VFM temperatures and that the significantly lower final cure temperatures produced lower total shrinkage of the die and the substrate. Finally, due to lower elastic moduli, the cured VFM parts showed better mechanical reliability with no fails up to 1500 cycles.

Warpage Analysis of Wafers With Film Coating

2001 ◽  
Author(s):  
Hai Ding ◽  
I. Charles Ume ◽  
Cheng Zhang
Keyword(s):  
Young’S Modulus ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Young's Modulus ◽  
Film Coating ◽  
Wafer Level ◽  
Element Analysis ◽  
Low Temperature Storage ◽  
Shadow Moire ◽  
Shadow Moiré

Abstract Wafer-level packaging (WLP) is one of the trends of electronic packaging in the 21st century. Since 1994, many companies have released WLP licenses. One of the common concerns among these various approaches is wafer warpage. Warpage of wafer tends to introduces crack or delamination during dicing and low temperature storage process. After wafer dicing, warpage could reduce the quality of each package in the long run. Many documented works indicated that in the design and implementation of WLP, some key parameters have to be carefully considered and closely controlled to ensure higher packaging quality with the minimum warpage. For the case of wafer-level flip chip, the key parameters are Young’s modulus, thickness, and coefficient of thermal expansion (CTE) of underfill. In this research, an experimental design and statistical methods have been used to identify the model structure and parameters that are critical to the warpage of wafers. Regression models were identified based on the data obtained from finite element analysis (FEA) that is verified by shadow Moiré experiments. According to the models, the CTE, the coupling of Young’s modulus and CTE, and the coupling of thickness and CTE of underfill primarily determine wafer warpage. Further FEA and shadow Moiré experiments indicate that the models are capable of predicting of wafer warpage in the process of WLP.

Thermal Fracture of Oxidized Polydimethylsiloxane and its Implications in Soft Lithography

2011 ◽  
Author(s):  
Wes W. Tooley ◽  
Shirin Feghhi ◽  
Sangyoon J. Han ◽  
Junlan Wang ◽  
Nathan J. Sniadecki
Keyword(s):  
Soft Lithography ◽  
Thermal Stresses ◽  
Elevated Temperatures ◽  
Coefficient Of Thermal Expansion ◽  
Curing Temperature ◽  
Surface Cracks ◽  
Element Analysis ◽  
Circular Test ◽  
Cte Mismatch ◽  
Cellular Forces

During the fabrication of nanopost arrays for measuring cellular forces, we have observed surface cracks in the negative molds used to replicate the arrays from a silicon master. These cracks become more numerous and severe with each replication such that repeated castings lead to arrays with missing or broken posts. This loss in pattern fidelity from the silicon master undermines the spatial resolution of the nanopost arrays in measuring cellular forces. We hypothesized that these cracks are formed because of a mismatch in the coefficient of thermal expansion (CTE) of PDMS and its oxidized surface layer. To study the fracture of PDMS due to thermal effects, we treated circular test samples of PDMS with oxidizing plasma and then heated them to cause surface cracks. These cracks were found to be more abundant at 180 °C than at lower temperatures. Finite element analysis of a bilayer material with a CTE mismatch was used to validate that thermal stresses are sufficient to overcome the fracture toughness of oxidized PDMS when heated to a curing temperature for PDMS. As a consequence, we have ascertained that elevated temperatures are a significant detriment to the reproducibility of nanoscale features in PDMS during replica molding.

An Optical Method for Measuring the Two-Dimensional Surface Curvatures of Electronic Packages During Thermal Cycling

2000 ◽  
Vol 123 (3) ◽  
pp. 196-199 ◽  
Author(s):  
Yong Du ◽  
Jie-Hua Zhao ◽  
Paul Ho
Keyword(s):  
Finite Element Analysis ◽  
Finite Element ◽  
Thermal Cycling ◽  
Optical Method ◽  
Flip Chip ◽  
Laser Beams ◽  
Electronic Packages ◽  
Two Dimensional ◽  
Element Analysis ◽  
Dimensional Surface

An optical method was developed to measure the two-dimensional (2D) surface curvatures of electronic packages by employing four laser beams. Each laser beam measures the slopes of the surface at the incident point along two perpendicular directions. By combining four pairs of slopes, the 2D surface curvatures of the package can be calculated. The surface warpage of an underfilled flip-chip package during thermal cycling was measured by this method and the result was verified by finite element analysis (FEA). Both experimental and FEA results show that the surface warpage is almost a linear function of temperature between 25°C and 150°C for the measured package.

A Comparative Finite Element Analysis of Residual Stresses in Active Fiber Composites With Embedded Metal-Core Piezoelectric Fibers and Macro Fiber Composites

Aerospace ◽  
2005 ◽  
Author(s):  
Davood Askari ◽  
Hiroshi Asanuma ◽  
Mehrdad N. Ghasemi-Nejhad
Keyword(s):  
Finite Element Analysis ◽  
Finite Element ◽  
Residual Stresses ◽  
Coefficient Of Thermal Expansion ◽  
Fiber Composites ◽  
Stress And Strain ◽  
Metal Core ◽  
Element Analysis ◽  
Active Fiber ◽  
Active Fiber Composites

Residual stresses are basically developed due to intrinsic and extrinsic strains that form during the processing of composite materials. The extrinsic strains can be determined using Coefficient of Thermal Expansion (CTE), material properties, geometry of the structure, and processing conditions. Finite Element Method (FEM) as an efficient alternative technique for stress and strain analysis of the micromechanical systems and structures, has been employed to numerically investigate the residual stresses developed in Metal-Core Piezoelectric Fibers (MPF) and Active Fiber Composites (AFC) (or Macro Fiber Composites (MFC)), during the processing. Here in this work, ANSYS Finite Element Analysis (FEA) software is used to develop three different 3-dimensional models for MPF and MFC structures and then each model is solved for strain and stress results. Next, the stress and strain components of these models are studied throughout the structures to identify the magnitude and type of the stresses and strains within the constituent materials and then compared.

Warpage Analysis of Underfilled Wafers

2004 ◽  
Vol 126 (2) ◽  
pp. 265-270 ◽  
Author(s):  
Hai Ding ◽  
I. Charles Ume ◽  
Cheng Zhang
Keyword(s):  
Young’S Modulus ◽  
Electronic Packaging ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Young's Modulus ◽  
Wafer Level ◽  
Element Analysis ◽  
Low Temperature Storage ◽  
Shadow Moire ◽  
Shadow Moiré

Wafer-level packaging (WLP) is one of the future trends in electronic packaging. Since 1994, many companies have released various WLP licenses. One of the common concerns of WLP is wafer warpage. Warpage of wafers tends to introduce cracking or delamination during dicing and low temperature storage processes. After wafer dicing, warpage could affect the quality of the dies and shorten the life of each packaged product. Many documented works indicated that in the design and implementation of multilayer structured electronic packaging products, some key parameters must be carefully considered and closely controlled to ensure the best packaging quality with the minimum warpage. During the wafer-level flip chip assembly process, the application of underfill on the whole wafer is a critical step. In this step, the key underfill parameters that affect wafer warpage are Young’s modulus, thickness, and coefficient of thermal expansion (CTE). In this paper, an experimental design and statistical methods were used to identify the model structure and parameters that are critical to the warpage of wafers. Bilinear regression models were identified based on the data obtained from finite element analysis (FEA) that was verified by shadow moire´ experiments. In FEA, the underfilled wafer structure is simplified to consisting of two layers of linear elastic materials. According to the models, the CTE, the coupling of Young’s modulus and CTE, and the coupling of thickness and CTE primarily determine wafer warpage. Further FEA and shadow moire´ experiments indicate that the models are capable of predicting wafer warpage in the WLP processes.

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