Interactions between Variable Frequency Microwave Underfill Processing and High Performance Packaging Materials

2013 ◽  
Vol 2013 (1) ◽  
pp. 000461-000466 ◽  
Author(s):  
Mamadou Diobet Diop ◽  
Marie-Claude Paquet ◽  
Dominique Drouin ◽  
David Danovitch

Variable frequency microwave (VFM) has been recently proposed as an alternative underfill curing method that provides flip chip package warpage improvement as well as potential underfill cure time reductions. The current paper outlines how such advantages in VFM processing of underfill can be compromised when applied to high performance organic packages. VFM recipes for three underfill materials were developed by performing several VFM curing runs followed by curing rate measurements using the differential scanning calorimetry method. The VFM curing rate was seen to strongly dependent upon the underfill chemistry. By testing flip chip parts that comprised large and high-end substrates, we showed that the underfill material has negligible impact on VFM warpage with the major cause attributed to the coefficient of thermal expansion mismatch between the die and the substrate. Comparison between the convection and the VFM methods indicated two warpage tendencies that depended upon the VFM curing temperature. First, when both curing methods used comparably high temperatures, warpage increases up to about + 20% were found with VFM. This unexpected result was explained by the high-density Cu loading of the substrate which systematically carried heat generated by VFM energy from the die/underfill system to the substrate. Since this high-end substrate consists of sequential dielectric/Cu layers with asymmetric distribution of Cu, additional stresses due to local CTE mismatches between the Cu and the dielectric layers were induced within the substrate processed with VFM. Second, warpage reductions down to about − 22% were obtained at the VFM curing temperature of 110°C with a curing time similar to that of convection cure. This suggests that the negative effect of the local CTE mismatches were no longer at play at the lower VFM temperatures and that the significantly lower final cure temperatures produced lower total shrinkage of the die and the substrate. Finally, due to lower elastic moduli, the cured VFM parts showed better mechanical reliability with no fails up to 1500 cycles.

1996 ◽  
Vol 445 ◽  
Author(s):  
Zak Fathi ◽  
Denise A. Tucker ◽  
Billy J. Wei ◽  
Richard S. Garard ◽  
Patricia F. Mead ◽  
...  

AbstractThis paper reports on the use of an emerging process technique for curing of polymer encapsulants as used in the electronic packaging industry. Previous work performed in the area of materials processing has demonstrated the usefulness of sweeping operating frequencies in order to achieve high levels of electric field uniformity and process control. The use of controlled variable frequency microwave energy has been evaluated as a process technique compatible with electronic packaging requirements. The heating of a series of integrated circuits (ICs) and their subsequent characterization was performed. IC integrity was investigated using X‐Ray, Acoustic Microscopy, Decapsulation and Bond Pull. Processing of liquid encapsulants, underfills and glob‐tops, used in Flip Chip and Chip On Board (COB) applications, was performed. Differential Scanning Calorimetry was used to study cure extent. Further studies show that variable frequency microwave processing leads to fast curing of encapsulants. A reduction in cycle times from 15 to 20 times over conventional curing has been observed. Also, results have showed a reduction in the stresses induced by mismatches in coefficient of thermal expansion.


Polymers ◽  
2020 ◽  
Vol 12 (3) ◽  
pp. 644 ◽  
Author(s):  
Farimah Tikhani ◽  
Shahab Moghari ◽  
Maryam Jouyandeh ◽  
Fouad Laoutid ◽  
Henri Vahabi ◽  
...  

For the first time, nano-scale aluminum hypophosphite (AlPO2) was simply obtained in a two-step milling process and applied in preparation of epoxy nanocomposites varying concentration (0.1, 0.3, and 0.5 wt.% based on resin weight). Studying the cure kinetics and thermal stability of these nanocomposites would pave the way toward the design of high-performance nanocomposites for special applications. Scanning electron microscopy (SEM) and transmittance electron microscopy (TEM) revealed AlPO2 particles having domains less than 60 nm with high potential for agglomeration. Excellent (at heating rate of 5 °C/min) and Good (at heating rates of 10, 15 and 20 °C/min) cure states were detected for nanocomposites under nonisothermal differential scanning calorimetry (DSC). While the dimensionless curing temperature interval (ΔT*) was almost equal for epoxy/AlPO2 nanocomposites, dimensionless heat release (ΔH*) changed by densification of polymeric network. Quantitative cure analysis based on isoconversional Friedman and Kissinger methods gave rise to the kinetic parameters such as activation energy and the order of reaction as well as frequency factor. Variation of glass transition temperature (Tg) was monitored to explain the molecular interaction in the system, where Tg increased from 73.2 °C for neat epoxy to just 79.5 °C for the system containing 0.1 wt.% AlPO2. Moreover, thermogravimetric analysis (TGA) showed that nanocomposites were thermally stable.


2005 ◽  
Vol 127 (1) ◽  
pp. 47-51 ◽  
Author(s):  
Man-Lung Sham ◽  
Jang-Kyo Kim

Polymeric encapsulant is widely used to protect the integrated circuit chips and thus to enhance the reliability of electronic packages. Residual stresses are introduced in the plastic package when the polymer is cooled from the curing temperature to ambient, from which many reliability issues arise, including warpage of the package, premature interfacial failure, and degraded interconnections. Bimaterial strip bending experiment has been employed successfully to monitor the evolution of the residual stresses in underfrill resins for flip chip applications. A numerical analysis is developed to predict the residual stresses, which agree well with the experimental measurements. The changes of material properties, such as flexural modulus and coefficient of thermal expansion, of the resins with temperature are taken into account in the finite element analysis.


Coatings ◽  
2020 ◽  
Vol 10 (11) ◽  
pp. 1114
Author(s):  
Kamal I. Aly ◽  
Abdulsalam Mahdy ◽  
Mohamed A. Hegazy ◽  
Nayef S. Al-Muaikel ◽  
Shiao-Wei Kuo ◽  
...  

Herein, we synthesized two new phthalimide-functionalized benzoxazine monomers, pPP-BZ and oPP-BZ, through Mannich reactions of 2-(4-hydroxyphenyl)isoindoline-1,3-dione (pPP) and 2-(2-hydroxyphenyl)isoindoline-1,3-dione (oPP), respectively, with p-toluidine and paraformaldehyde. The structures of these two monomers were confirmed using Fourier transform infrared (FTIR) and nuclear magnetic resonance spectroscopy. We used differential scanning calorimetry, FTIR spectroscopy, and thermogravimetric analysis to study the polymerization behavior and thermal stability of the monomers and their corresponding polybenzoxazines. Poly(pPP-BZ) and poly(oPP-BZ) were formed on mild steel (MS) through spin-coating and subsequent thermal curing polymerization. We used various corrosion testing methods to examine the effect of the curing temperature on the corrosion resistance of the coated MS samples in 3.5 wt.% aqueous solution of NaCl. Among our tested systems, the corrosion rate reached a low of 2.78 µm·Y−1 for the MS coated with poly(pPP-BZ)180 (i.e., the coating that had been cured at 180 °C); this value is much lower than that (4.8 µm·Y−1) reported for a maleimide-based benzoxazine compound (MI-Bz)/33 wt.% ACAT (amine-capped aniline trimer) blend. Thus, the incorporation of the imide functional group into the PBZ coatings is an effective strategy for affording high-performance corrosion resistance.


2003 ◽  
Vol 782 ◽  
Author(s):  
Marvin I. Francis ◽  
Kellen Wadach ◽  
Satyajit Walwadkar ◽  
Junghyun Cho

ABSTRACTFlip-chip technology is becoming one of the most promising packaging techniques for high performance packages. Solder balls are used as the connection technique in the flip-chip method and the connections are reinforced by filling in the spacing between the chip and substrate with underfill. The function of the underfill is to reduce the stresses in the solder joints caused by a coefficient of thermal expansion (CTE) mismatch. The presence of polymeric underfill material will, however, make the flip-chip packaging system susceptible to interfacial failure. Thus, the purpose of this study is to examine the interfacial delamination between the dissimilar materials in order to increase the reliability of the flip-chip interconnection method, and to understand the effect of underfill curing conditions on the interface adhesion. In particular, we use a linear elastic fracture mechanics (LEFM) approach to assess interfacial toughness. For this purpose, four-point bending testing is performed to determine a critical strain energy release rate, Gc. In addition, nano-indentation testing equipped with atomic force microscope (AFM) is employed to determine structure and properties of the underfill layer.


2009 ◽  
Vol 131 (3) ◽  
Author(s):  
Sangil Lee ◽  
M. J. Yim ◽  
Daniel Baldwin

This paper investigates the void formation mechanism induced by chemical interaction between eutectic solder (Sn63/Pb37) wetting and no-flow underfill material curing during flip chip in package assembly. During the process, low weight molecular components, such as fluxing agents and water molecules, could be induced by the chemical interaction between solder wetting and underfill curing when these components are heated to melt and cure, respectively. The low weight molecular components become volatile with exposure to temperatures above their boiling points; this was found to be the main source of the extensively formed underfill voiding. This mechanism of chemically and thermally induced voids was explained using void formation study, differential scanning calorimetry thermogram comparison, and gas chromatography and mass spectroscopy chemical composition identification on the suggested chemical reaction formula. This finding can enhance understanding of the mechanism that drives no-flow underfill voiding and can develop a void-free flip chip assembly process using no-flow underfill material for cost effective and high performance electronics packaging applications. Furthermore, this study provides the design guideline to develop an advanced no-flow underfill having high performance at high temperature range for the lead-free application.


Author(s):  
Ching Chia Chen ◽  
David Lai ◽  
Vito Lin ◽  
Yu Po Wang

Abstract With die size increasing and bump pitch decreasing on FCBGA (flip chip ball grid array), warpage is the first challenge that processes of package assembly and SMT (surface mount technology) will have. The main factor is CTE (coefficient of thermal expansion) mismatch between chip and substrate. The larger die size, the more significant elongation difference which could cause warpage. Furthermore, serious warpage can cause manufacture difficulties, such as bump bridge, bump non-wet and underfill (UF) void. As the result, in order to control package warpage, additional force, such as high modulus UF or metal heat sink are usually applied to restrict package deformation. However, the more additional force is applied, the more stress may be transferred to chip and causes chip corner or UF crack where easily cause stress concentration. In this paper, large package > 70 * 70 mm is studied for the challenges of on substrate process and reliability, meanwhile simulation is performed for stress prediction. In addition, possible solutions from material and process are discussed and studied.


Author(s):  
Nokibul Islam ◽  
Miguel Jimarez ◽  
Ahmer Syed ◽  
TaeKyeong Hwang ◽  
JaeYun Gim ◽  
...  

Flip Chip (FC) technology has now become the mainstream solution for high performance packages. From commercial gaming machines to high reliability servers, the FC package is gaining more market share over traditional packaging technologies, such as wire bond. Extensive research has been carried out to make the flip chip more robust, smaller foot prints, and excellent performance. FC packages are fabricated typically in two main configurations. Bare die FC packages leave the non active side of the die exposed. This allows the customer to apply their preferred heat dissipation scheme during board level attach. Lidded FC packages use a metallic lid attached to the die. Bare die package can be further subdivided into bare die underfilled package and bare die flip chip molded ball grid array (FCmBGA) package. Each of these packaging configurations has advantages as well as disadvantages. FCmBGA uses molding compound or EMC instead of capillary underfill, to protect FC die, and eliminate the need for a lid. Package warpage reduced a lot by adding a lid with the bare die FC package. However, the package and board level reliability for the above package types are still debatable. In this study test vehicles with three package types with bumps and BGAs are daisy chain to measure in situ data during accelerated tests. Impact of standard vs. low CTE (coefficient of thermal expansion) core substrate, accelerated temperature cycle conditions (temperature cycle condition “B”, “H”, and “J” according to JEDEC), and package level vs. package mounted on the board level reliability will be investigated. Comprehensive reliability data will help to select the right package type for next generation large die large body flip chip application.


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