Effects of Trace Layers and Joule Heating on the Temperature Distribution of Printed Circuit Boards: A Computational Study

2009 ◽  
Vol 1 (2) ◽  
Author(s):  
M. Baris Dogruoz ◽  
Manoj K. Nagulapally
Keyword(s):  
Joule Heating ◽  
Hot Spots ◽  
Printed Circuit Board ◽  
Computational Study ◽  
Computational Cost ◽  
Circuit Board ◽  
System Level ◽  
Printed Circuit ◽  
System Level Simulation ◽  
Background Mesh

A printed circuit board (PCB) is generally a multilayered board made of dielectric material and several layers of traces and vias. Performing detailed system-level computational fluid dynamics (CFD) simulations of PCBs including meshed trace and via geometries for each of the layers is impractical. In the present approach, the effects of the trace and via geometry are accurately modeled in the physical model by importing electronics computer aided-design data consisting of the trace and via layout of the board and computing locally varying orthotropic conductivity (kx, ky, and kz) on the printed circuit board using a background mesh. The spatially varying orthotropic conductivity is then mapped from the background mesh to the CFD mesh and used in a system-level simulation of the PCB with a minimal increase in the overall computational cost. On the other hand, as PCB component densities increase, the current densities increase thereby leading to regions of hot spots due to Joule heating. Hence, it is essential that the computational heat transfer simulations account for the heating due to the high current carrying traces. In order to accurately model the Joule heating of traces and vias, it is of essence to solve for the conservation of current in each of these traces. In this study, the effects of both trace layer nonhomogeneity and Joule heating are examined on a sample PCB with several components attached to it. The results are then compared with those from the conventional modeling techniques. It is demonstrated that there is considerable difference in the location of the hot spots and temperature values between two different methods.

Computational Modeling of Anisotropic Thermal Conductivity and Joule Heating on Printed Circuit Boards

2011 ◽  
Author(s):  
M. Baris Dogruoz ◽  
Gokul Shankaran ◽  
Gregory Pitner ◽  
Manoj Nagulapally
Keyword(s):  
Thermal Conductivity ◽  
Joule Heating ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Dielectric Material ◽  
Circuit Board ◽  
System Level ◽  
Field Equations ◽  
Printed Circuit ◽  
Anisotropic Thermal Conductivity

A printed circuit board (PCB) consists of consecutive layers of dielectric material and current carrying traces and vias. Conducting system level simulations of PCB’s with detailed trace and via geometries is computationally very expensive. In the present study, the effects of the trace and via geometry in the physical model are taken into account by importing the corresponding ECAD data with which locally varying anisotrpoic thermal conductivity on the PCB is determined accordingly. Moreover, the effects of Joule heating in the current carrying traces are included by using a number of planar heat sources representing individual metal trace layers. The powermap on each of these layers is determined by solving the relevant electric field equations where the temperature dependency of the electrical field is also taken into account. The results are presented on a sample PCB and comparisons are made with the previous studies and conventional models. It is demonstrated that temperature values differ substantially depending on the method of Joule heating treatment used.

scholarly journals Universal synthesis of conductive liquid network in polymers enabling elastic printed circuit board technology

2021 ◽  
Author(s):  
Jiheong Kang ◽  
Wonbeom Lee ◽  
Hyunjun Kim ◽  
Inho Kang ◽  
Hongjun Park ◽  
...  
Keyword(s):  
Liquid Metal ◽  
Acoustic Field ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
System Level ◽  
Large Strains ◽  
Stretchable Electronics ◽  
Electronic Components ◽  
Conductive Liquid ◽  
Printed Circuit

Abstract Stretchable electronics are considered next-generation electronic devices in a broad range of emerging fields, including soft robotics1,2, biomedical devices3,4, human-machine interfaces5,6, and virtual or augmented reality devices7,8. A stretchable printed circuit board (S-PCB) is a basic conductive framework for the facile assembly of system-level stretchable electronics with various electronic components. Since an S-PCB is responsible for electrical communications between numerous electronic components, the conductive lines in S-PCB should strictly satisfy the following features: (i) metallic conductivity, (ii) constant electrical resistance during dynamic stretching, and (iii) tough interface bonding with various components9. Despite recent significant advances in intrinsically stretchable conductors10,11,12, they cannot simultaneously satisfy the above stringent requirements. Here, we present a new concept of conductive liquid network-based elastic conductors. These conductors are based on unprecedented liquid metal particles assembled network (LMPNet) and an elastomer. The unique assembled network structure and reconfigurable nature of the LMPNet conductor enabled high conductivity, high stretchability, tough adhesion, and imperceptible resistance changes under large strains, which enabled the first elastic-PCB (E-PCB) technology. We synthesized LMPNet through an acoustic field-driven cavitation event in the solid state. When an acoustic field is applied, liquid metal nanoparticles (LMPnano) are remarkably generated from original LMPs and assemble into a highly conductive particle network (LMPNet). Finally, we demonstrated a multi-layered E-PCB, in which various electronic components were integrated with tough adhesion to form a highly stretchable health monitoring system. Since our synthesis of LMPNet is universal, we could synthesize LMPNet in various polymers, including hydrogel, self-healing elastomer and photoresist and add new functions to LMPNet.

A Solder Joint Reliability Model for the Philips Lumileds LUXEON Rebel LED Carrier Using Physics of Failure Methodology

2013 ◽  
Vol 2013 (1) ◽  
pp. 000887-000892 ◽  
Author(s):  
Rudi Hechfellner ◽  
Michiel Kruger ◽  
Tewe Heemstra ◽  
Greg Caswell ◽  
Nathan Blattau ◽  
...  
Keyword(s):  
Solder Joint ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Light Emitting Diodes ◽  
Coefficient Of Thermal Expansion ◽  
Thermal Control ◽  
Circuit Board ◽  
System Level ◽  
Light Emitting ◽  
Printed Circuit

Light Emitting Diodes (LEDs) are quickly evolving as the dominant lighting solution for a wide variety of applications. With the elimination of incandescent light bulbs and the toxic limitations of fluorescent bulbs, there has been a dramatic increase in the interest in high-brightness light emitting diodes (HB-LEDs). Getting the light out of the die, with reliable color, while maintaining appropriate thermal control over a long service life is a challenge. These issues must be understood and achieved to meet the needs of unique applications, such as solidstate-lighting, automotive, signage, and medical applications. These applications have requirements for 15–25 years of operation making their reliability of critical importance. The LUXEON Rebel has been accepted as an industry leading LED product, widely used in Mean-Time-Between-Failure (MTBF) sensitive applications. Customers use various mounting platforms, such as FR4 Printed Circuit Board (PCB), FR4 PCB with thermal via's, Aluminum & Copper Metal Core printed Circuit Boards (MCPCB), Super MCPCB, etc. As in other LEDs, when mounting to a platform where a large Coefficient of Thermal Expansion (CTE) exists between the LED & the PCB, Solder fatigue could become an issue that may affect system level lifetime. In this paper we have examined extreme cases and how a solder joint can impact system level reliability. We have modeled the conditions and formed a means to predict system level reliability. We have compared the prediction modeling with empirical tests for validation of the models. It is vital to understand system level reliability factors to build lighting solutions that match the application and customer expectations. It is impractical to test LEDs and other components for 50k hours ~5 years since the device evolution is much faster than that – on average one LED generation every 12–18 month. Hence we need models and prediction methods …..

SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure

2021 ◽  
Vol 17 (3) ◽  
pp. 1-28
Author(s):  
Shubhra Deb Paul ◽  
Swarup Bhunia
Keyword(s):  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Supply Voltage ◽  
Semiconductor Industry ◽  
Electronic System ◽  
Circuit Board ◽  
System Level ◽  
Printed Circuit ◽  
Industry Standard ◽  
Custom Hardware

A printed circuit board (PCB) provides necessary mechanical support to an electronic system and acts as a platform for connecting electronic components. Counterfeiting and in-field tampering of PCBs have become significant security concerns in the semiconductor industry as a result of increasing untrusted entities in the supply chain. These counterfeit components may result in performance degradation, profit reduction, and reputation risk for the manufacturers. While Integrated Circuit (IC) level authentication using physical unclonable functions (PUFs) has been widely investigated, countermeasures at the PCB level are scarce. These approaches either suffer from significant overhead issues, or opportunistic counterfeiters can breach them like clockwork. Besides, they cannot be extended to system-level (both chip and PCB together), and their applications are also limited to a specific purpose (i.e., either counterfeiting or tampering). In this article, we introduce SILVerIn , a novel systematic approach to verify the authenticity of all chips used in a PCB as well as the board for combating attacks such as counterfeiting, cloning, and in-field malicious modifications. We develop this approach by utilizing the existing boundary scan architecture (BSA) of modern ICs and PCBs. As a result, its implementation comes at a negligible (∼0.5%) hardware overhead. SILVerIn  is integrated into a PCB design during the manufacturing phase. We implement our technique on a custom hardware platform consisting of an FPGA and a microcontroller. We incorporate the industry-standard JTAG (Joint Test Action Group) interface to transmit test data into the BSA and perform hands-on measurement of supply current at both chip and PCB levels on 20 boards. We reconstruct these current values to digital signatures that exhibit high uniqueness, robustness, and randomness features. Our approach manifests strong reproducibility of signatures at different supply voltage levels, even with a low-resolution measurement setup. SILVerIn  also demonstrates a high resilience against machine learning-based modeling attacks, with an average prediction accuracy of ∼51%. Finally, we conduct intentional alteration experiments by replacing the on-board FPGA to replicate the scenario of PCB tampering, and the results indicate successful detection of in-field modifications in a PCB.

Assessment of Joule Heating and Temperature Distribution on Printed Circuit Boards Via Electrothermal Simulations

2016 ◽  
Vol 138 (2) ◽  
Author(s):  
M. Baris Dogruoz
Keyword(s):  
Thermal Conductivity ◽  
Temperature Distribution ◽  
Joule Heating ◽  
Computer Aided Design ◽  
Printed Circuit Boards ◽  
Dielectric Material ◽  
Circuit Board ◽  
System Level ◽  
Cfd Simulations ◽  
Printed Circuit

A printed circuit board (PCB) comprises a solid piece of dielectric material with embedded layers of current carrying metal traces and vias. Geometric features of these metal traces and vias in modern PCBs are highly nonuniform and complicated such that the card level or system level numerical simulations by using the actual trace and via geometries are computationally expensive. The present study investigates the effects of Joule heating in current carrying traces on the temperature distribution of PCBs by conducting one-way and two-way direct current (DC) electric and computational fluid dynamics (CFD) simulations. DC electric field simulations are performed to determine the power map of trace layers which are modeled as planar heat generating sources by using the temperature-dependent electrical conductivity of the metal trace. The power distribution varies with the implemented size and power thresholds. Thermal conductivity map of the PCB is determined by using the electronic computer-aided design (ECAD) images of the individual layers. By using these planar source and thermal conductivity maps, CFD simulations are conducted to determine the resulting temperature distribution on the board. A methodology is developed and applied to a sample, complex PCB, and the generated results are compared with those of the previous studies and conventional models. The computational data show that the temperature distributions over the PCB and its mounted components experience large variations based on the implemented thermal conductivity mapping and the Joule heating modeling technique.

Case Study—Failure Analysis of a Printed Circuit Board Latent Failure and Resulting Implication of Weaknesses in Panel Coupons and Lot DPA

2017 ◽  
Author(s):  
Tom Tuite
Keyword(s):  
Failure Mechanism ◽  
Printed Circuit Board ◽  
Short Circuit ◽  
Circuit Board ◽  
System Level ◽  
Drilling Process ◽  
Printed Circuit ◽  
Root Cause ◽  
Ionic Contamination ◽  
Root Cause Identification

Abstract Multiple, independent, system level test failures that occurred around the same time were traced back to a short circuit on the same type of printed circuit board (PCB). The PCBs were removed from the application and sent to the authors' lab for analysis. This paper reviews the analysis techniques and results that led to the failure mechanism being identified. The discussion focuses on steps taken to exonerate the authors' lab and processes as possible sources of contamination. Additional investigation that leads to the conclusion that the issue is systemic is also covered. The paper then focuses on the containment effort as well as root cause identification at the manufacturers. It was concluded that the failure mechanism causing the short circuit in the failed PCB is due to ionic contamination trapped inside the PCB. The normal chemistry required to process the plated through holes contaminated the voids/fractures created by drilling process.

A Novel Scheme in Thermal Modeling of Printed Circuit Boards

2005 ◽  
Author(s):  
Wenjun Liu ◽  
Min-Young Lee ◽  
Younes Shabany ◽  
Mehdi Asheghi
Keyword(s):  
Thermal Resistance ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Thermal Modeling ◽  
Circuit Board ◽  
System Level ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Compact Expression ◽  
Conductivity Contrast

This paper presents a simple yet novel analytical approach to model the heat conduction in a Printed Circuit Board (PCB) by taking advantage of the large thermal conductivity contrast between the copper and glass-epoxy layers. The model provides a compact expression for the effective thermal resistance of a PCB and captures an approximate 2-dimensional temperature distribution within the PCB copper layer using simple one-dimensional fin equations in successive copper-glass epoxy layers. The results for effective thermal resistance and temperature distributions in copper layers agree within ±10% of those predicted using finite element (FEM) simulations. The present approach can significantly improve the system level thermal modeling and design of single and multi-component PCBs.

Sign in / Sign up

Export Citation Format

Share Document