Reducing hot spots and junction temperatures of integrated circuits using carbon composite in a printed circuit board and substrate

Author(s):  
K. Vasoya
2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.


2021 ◽  
Vol 11 (6) ◽  
pp. 2808
Author(s):  
Leandro H. de S. Silva ◽  
Agostinho A. F. Júnior ◽  
George O. A. Azevedo ◽  
Sergio C. Oliveira ◽  
Bruno J. T. Fernandes

The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC’s weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB’s ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs’ ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.


Author(s):  
Vasudivan Sunappan ◽  
Chee Wai Lu ◽  
Lai Lai Wai ◽  
Wei Fan ◽  
Boon Keng Lok

A novel process has been developed to embed discrete (surface mountable) passive components like capacitors, resistors and inductors using printed circuit board fabrication technology. The process comprises of mounting passive components on top surface of a core PCB (printed circuit board) material using surface mount technology. The passive components mounting were designed in multiple clusters within the PCB. Dielectric sheets are sandwiched between top surface of core PCB and second PCB material for lamination process. A direct interconnection of the passive components to one or more integrated circuits (IC) is further accomplished by mounting the ICs on the bottom surface of the core material in an area directly under the passive components. The close proximity of the embedded passive components such as capacitors to an IC improved electrical performance by providing impedance reduction and resonance suppression at high frequency range. The reliability of solder joints was evaluatedd by temperature cycling test.


2020 ◽  
Vol 7 (1.) ◽  
Author(s):  
Gyula Korsoveczki

The topic of the given task based on the optical opposition of a mounted printed circuit board using National Instruments software. During the inspection, 7 types of resistors, 3 types of integrated circuits, barcodes and text were detected. The results of the detection have been visualized and a Microsoft Excel scan report has been exported. The optical inspection was carried out using the National Instruments Vision Development Module and LabVIEW development environments.


Author(s):  
M. Baris Dogruoz ◽  
Manoj K. Nagulapally

A printed circuit board (PCB) is generally a multilayered board made of dielectric material and several layers of traces and vias. Performing detailed system-level computational fluid dynamics (CFD) simulations of PCBs including meshed trace and via geometries for each of the layers is impractical. In the present approach, the effects of the trace and via geometry are accurately modeled in the physical model by importing electronics computer aided-design data consisting of the trace and via layout of the board and computing locally varying orthotropic conductivity (kx, ky, and kz) on the printed circuit board using a background mesh. The spatially varying orthotropic conductivity is then mapped from the background mesh to the CFD mesh and used in a system-level simulation of the PCB with a minimal increase in the overall computational cost. On the other hand, as PCB component densities increase, the current densities increase thereby leading to regions of hot spots due to Joule heating. Hence, it is essential that the computational heat transfer simulations account for the heating due to the high current carrying traces. In order to accurately model the Joule heating of traces and vias, it is of essence to solve for the conservation of current in each of these traces. In this study, the effects of both trace layer nonhomogeneity and Joule heating are examined on a sample PCB with several components attached to it. The results are then compared with those from the conventional modeling techniques. It is demonstrated that there is considerable difference in the location of the hot spots and temperature values between two different methods.


Author(s):  
Oleg Yu. Sisoev ◽  
Sergey S. Sokolov ◽  
Victor A. Tupik

The analysis of autorouter efficiency in the known CAD systems under structural and technological constraints is carried out. The revealed significant constraints are related to the thermal strength of the wires and possible mutual influence through the electromagnetic field. When manually designing the designer guided by his own experience, can ignore these and other constraints. Unlike a person, the autorouter strictly fulfills all the specified constraints, which, given the topology of the printed circuit board, does not allow tracing to complete. On the other hand, giving greater freedom to the autorouter often makes it impossible to meet the production requirements on permissible parameters of the topological pat-tern, which is the width of the conductors and the gaps between them. The problem of tracing printed circuit boards, including multilayer ones, has become much more complicated with the introduction of integrated circuits in TSOP, MOFP and BGA type enclosures packages with fine-pitch pins, a number of which can reach several hundred. The article investigates the possibility of maximizing printed circuit board topological space with these and other types of enclosures. The necessity of introducing a buffer zone around the component to improve the routing efficiency is explained. It is shown, however, that the avail-ability of a buffer zone does not eliminate the appearance of vias in it, the number of which depends on the routing type. On the basis of the proposed criterion for the autorouter performance, i.e. the ratio of the total wire length to the number of vias, the efficiency of using the topological space of a printed circuit board by three autorouters is analyzed.The presented experimental results of competing routing systems TopoR and Specctra confirmed the possibility to enlarge the pattern area of the printed circuit board for its further use.


1984 ◽  
Vol 11 (3) ◽  
pp. 215-217
Author(s):  
I. Hajdu ◽  
P. Bánlaki ◽  
J. Pinkola ◽  
E. Tóth

Printed circuits make up to 20 to 40 per cent of the value of electronic circuits.Quality and reliability requirements have been boosted by the general use of complex integrated circuits. An economical and high quality production is preconditioned by the continuous checking of prime materials and technologies.After a brief review of checking methods, a short examination of quality testing of the end product (double - or multilayer printed circuit board) is given, involving checking methods of assembled and non assembled boards.


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