MATADOR: AN EXPLORATION ENVIRONMENT FOR SYSTEM-DESIGN

2002 ◽  
Vol 11 (05) ◽  
pp. 503-535 ◽  
Author(s):  
PAUL MARCHAL ◽  
MURALI JAYAPALA ◽  
SAMUEL XAVIER DE SOUZA ◽  
PENG YANG ◽  
FRANCKY CATTHOOR ◽  
...  

We present a modular platform simulation environment to estimate the energy consumption and performance of distributed systems in a Systems-on-Chip context. We use the simulation environment to support the development of our high-level design methodologies. More in particular, we steer and verify the development of a task-level data transfer and storage methodology, the development of a task-level scheduling methodology and the development of an instruction memory management methodology. All of these methodologies are focussed on reducing the overall energy consumption of the complex dynamic system on a heterogeneous platform architecture. Compared to research in the academic and industrial context, our contribution is to integrate in a scalable way existing energy and performance simulators of the components of a heterogeneous multiprocessor SoC. Also a novel instruction memory hierarchy is included. The simulation environment consists of multiple processing nodes connected to a distributed memory hierarchy. To reduce the energy consumption of the system, both the processing nodes as well as the memory architecture can be varied: the processing voltage of each node can be tuned and the memory hierarchy can be fully customized. The integration of dynamic real-time applications on this platform is simplified by the availability of a multi-processor RTOS. The use of the simulator to develop our high-level design methodologies is illustrated on real-life multimedia applications.

Author(s):  
R. Grant Reed ◽  
Robert H. Sturges

Abstract We consider a design advisor to be performance-intelligent when its suggestions do not conflict with high level performance-related goals of the design under study. We address the problem of representing non-domain-specific design Information at a high level and describe coupling it to the inputs and outputs of design critics and their suggestion mechanisms. High level design Information represented in a function-based structure with linked allocations is shown to interact with a domain-specific design critic in three instances, viz.: allocation refinement, goal matching with a supported function, and performance-intelligent tradeoffs. Examples of manual and computer-based procedures are discussed.


Author(s):  
Oshin Sharma ◽  
Hemraj Saini

Cloud computing has revolutionized the working models of IT industry and increasing the demand of cloud resources which further leads to increase in energy consumption of data centers. Virtual machines (VMs) are consolidated dynamically to reduce the number of host machines inside data centers by satisfying the customer's requirements and quality of services (QoS). Moreover, for using the services of cloud environment every cloud user has a service level agreement (SLA) that deals with energy and performance trade-offs. As, the excess of consolidation and migration may degrade the performance of system, therefore, this paper focuses the overall performance of the system instead of energy consumption during the consolidation process to maintain a trust level between cloud's users and providers. In addition, the paper proposed three different heuristics for virtual machine (VM) placement based on current and previous usage of resources. The proposed heuristics ensure a high level of service level agreements (SLA) and better performance of ESM metric in comparison to previous research.


2002 ◽  
Vol 11 (05) ◽  
pp. 459-475
Author(s):  
FRANK VAHID ◽  
TONY GIVARGIS ◽  
SUSAN COTTERELL

Memory accesses account for a large percentage of total power in microprocessor-based embedded systems. The increasing use of microprocessor cores and synthesis, rather than prefabricated microprocessor chips, creates the opportunity to tune a memory hierarchy to the one program that will execute in the embedded system. Such tuning requires fast and accurate estimation of the power and performance of different memory configurations. We describe a general three-step approach to developing such estimators, based on our experiences on several different projects. Each step is increasingly fast, using the previous step to gauge accuracy. The first step uses high-level functional simulation, the second step uses trace simulation, and the third step uses equations. A tool developer can follow these three steps to create a powerful environment for core users to support synthesis of the best memory hierarchy for a particular embedded system. The approach can be applied to components other than memory also.


VLSI Design ◽  
2002 ◽  
Vol 14 (3) ◽  
pp. 273-286
Author(s):  
N. D. Zervas ◽  
K. Masselos ◽  
Y. A. Karayiannis ◽  
C. E. Goutis

A systematic methodology for energy dissipation reduction of multimedia applications realized on architectures based on embedded cores and application specific data memory organization is proposed. Performance and area are explicitly taken into account. The proposed methodology includes two major steps: A high-level code transformation step that reorganizes the original description of the target application. The second major step includes the determination of the processor, memory and bus organization of the system and is briefly described. Experimental results from several real-life demonstrators prove the impact of the high level step of the proposed methodology.


2022 ◽  
Vol 18 (2) ◽  
pp. 1-26
Author(s):  
Md Adnan Zaman ◽  
Rajeev Joshi ◽  
Srinivas Katkoori

For memristive crossbar arrays, currently, no high-level design validation and early space exploration tools exist in the literature. Such tools are essential to quickly verify the design functionality as well as compare design alternatives in terms of power and performance. In this work, we propose a VHDL-based framework that enables us to quickly perform behavioral simulation as well as estimate dynamic energy consumption and speed of any large memristive crossbar array. We propose a high-level (VHDL) model of a memristor based on which crossbar architectures can be modeled. The individual memristor model is embedded with power and delay numbers obtained from a detailed memristor model. We demonstrate the framework for MAGIC-style memristive crossbars. We validate the framework against detailed Verilog-A based model on fifteen combinational benchmarks. For the single row model, we obtained 153x simulation speedup over HSPICE, average estimation errors of 6.64% and 0% for dynamic energy consumption and cycle-time, respectively. For the transpose model, we obtained average estimation errors of 5.51% and 10.90% for dynamic energy consumption and cycle-time, respectively. We also extend our framework to support another prominent logic style and validate through a case study. The proposed framework can be easily extended to other emerging technologies.


Author(s):  
Toby J. Lloyd-Jones ◽  
Juergen Gehrke ◽  
Jason Lauder

We assessed the importance of outline contour and individual features in mediating the recognition of animals by examining response times and eye movements in an animal-object decision task (i.e., deciding whether or not an object was an animal that may be encountered in real life). There were shorter latencies for animals as compared with nonanimals and performance was similar for shaded line drawings and silhouettes, suggesting that important information for recognition lies in the outline contour. The most salient information in the outline contour was around the head, followed by the lower torso and leg regions. We also observed effects of object orientation and argue that the usefulness of the head and lower torso/leg regions is consistent with a role for the object axis in recognition.


2020 ◽  
Vol 12 (2) ◽  
pp. 19-50 ◽  
Author(s):  
Muhammad Siddique ◽  
Shandana Shoaib ◽  
Zahoor Jan

A key aspect of work processes in service sector firms is the interconnection between tasks and performance. Relational coordination can play an important role in addressing the issues of coordinating organizational activities due to high level of interdependence complexity in service sector firms. Research has primarily supported the aspect that well devised high performance work systems (HPWS) can intensify organizational performance. There is a growing debate, however, with regard to understanding the “mechanism” linking HPWS and performance outcomes. Using relational coordination theory, this study examines a model that examine the effects of subsets of HPWS, such as motivation, skills and opportunity enhancing HR practices on relational coordination among employees working in reciprocal interdependent job settings. Data were gathered from multiple sources including managers and employees at individual, functional and unit levels to know their understanding in relation to HPWS and relational coordination (RC) in 218 bank branches in Pakistan. Data analysis via structural equation modelling, results suggest that HPWS predicted RC among officers at the unit level. The findings of the study have contributions to both, theory and practice.


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