A Wideband Gain Linearized Microwave Voltage Controlled Oscillator with Low Phase Noise Variation in Nanometer CMOS Technology

2015 ◽  
Vol 24 (03) ◽  
pp. 1550024 ◽  
Author(s):  
Mohammed Aqeeli ◽  
Abdullah Alburaikan ◽  
Cahyo Muvianto ◽  
Xianjun Huang ◽  
Zhirun Hu
Keyword(s):  
Phase Noise ◽  
Frequency Tuning ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Voltage Controlled Oscillator ◽  
Lower Phase ◽  
Nanometer Cmos ◽  
Digitally Controlled ◽  
Binary Weighted ◽  
Low Phase Noise

A wideband CMOS LC tank voltage-controlled oscillator (VCO) with low phase noise variations and a linearized gain has been designed using a new binary-weighted switched-capacitor and digitally-controlled varactor bank. The novel design has the advantages of more linear VCO frequency tuning, lower phase noise and reduced gain to variations in supply voltage. The proposed VCO has been designed using UMC 90-nm, 6-metal CMOS technology and features phase noise variation of less than 4.9 dBc/Hz. The VCO operates from 3.45 to 6.55 GHz, with phase noise of -133.4 dBc/Hz at a 1 MHz offset, a figure of merit (FoM) of -203.3 dBc/Hz, less than 41 dBm spurious harmonics, and a total VCO core current consumption of 1.18 mA from a 3.3 V voltage supply. To the authors' knowledge, this is the lowest phase noise variation ever reported.

scholarly journals A LOW PHASE NOISE, POWER EFFICIENT VOLTAGE CONTROLLED OSCILLATOR USING 0.18-μM CMOS TECHNOLOGY

2014 ◽  
pp. 256-259
Author(s):  
AJIT SAMASGIKAR
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
Tuning Range ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Noise Power ◽  
Voltage Controlled Oscillator ◽  
Power Efficient ◽  
Sustained Oscillations ◽  
Low Phase Noise

A low phase noise, power efficient VCO using UMC 0.18μm CMOS technology has been proposed in this paper. The proposed VCO has a tuning range of 9.71GHz to 9.9GHz, with a phase noise of -79.88 dBc/Hz @ 600kHz offset. The Vtune ranging between 1V - 1.5V generates sustained oscillations. The maximum power consumption of the VCO is 11.9mW using a supply voltage of 1.8V with ±10% variation.

Low Phase Noise, 18kHz Frequency Tuning Step, 5GHz, 15bit Digitally Controlled Oscillator in 0.18µm CMOS Technology

2010 ◽  
Vol E93-C (7) ◽  
pp. 1007-1013
Author(s):  
Ramesh K. POKHAREL ◽  
Kenta UCHIDA ◽  
Abhishek TOMAR ◽  
Haruichi KANAYA ◽  
Keiji YOSHIDA
Keyword(s):  
Phase Noise ◽  
Frequency Tuning ◽  
Cmos Technology ◽  
Digitally Controlled ◽  
Digitally Controlled Oscillator ◽  
Low Phase Noise

Design of a Low-Phase-Noise LC Voltage Controlled Oscillator

2014 ◽  
Vol 519-520 ◽  
pp. 1095-1098
Author(s):  
Cheng Hong Dong ◽  
Chang Chun Zhang ◽  
Yu Feng Guo ◽  
Lei Lei Liu ◽  
Xin Cun Ji ◽  
...  
Keyword(s):  
Phase Noise ◽  
Figure Of Merit ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Negative Resistance ◽  
Voltage Controlled Oscillator ◽  
Frequency Range ◽  
Supply Current ◽  
Low Phase Noise ◽  
Lc Vco

A novel low phase noise LC Voltage Controlled Oscillator (LC-VCO) is designed in standard 0.18μm CMOS technology. Instead of common NMOS cross-pairs for a conventional complementary LC VCO, both body-biasing and Q-enhancement techniques are employed to provide a larger negative resistance for the VCO. Post-layout simulations showed that it can oscillate at a frequency range of 4.34-4.73GHz, and comsume a supply current of 1.52mA from a supply voltage of 1.8V. The VCO achieves a phase noise of -132.8dBc/Hz @ 1MHz offset and a figure of merit (FOM) of -195.9dBc/Hz at the frequency of 4.5GHz. A die area of 475μm×498.6μm is occupied.

A 2.3 mW Multi-Frequency Clock Generator with −137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology

2019 ◽  
Vol 29 (08) ◽  
pp. 2050130 ◽  
Author(s):  
Jagdeep Kaur Sahani ◽  
Anil Singh ◽  
Alpana Agarwal
Keyword(s):  
Phase Noise ◽  
Supply Voltage ◽  
Dead Zone ◽  
Dynamic Logic ◽  
Cmos Technology ◽  
Control Voltage ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Cmos Inverter ◽  
Digital Cmos

A fast phase frequency detector (PFD) and low gain low phase noise voltage-controlled oscillator (VCO)-based phase-locked loop (PLL) design are presented in this paper. PLL works in the frequency range of 0.025–1.6[Formula: see text]GHz, targeting various SoC applications. The proposed PFD, designed using CMOS dynamic logic, is fast and improves the locking time, dead zone and blind zone in the PLL. The standard CMOS inverter gate-based pseudo differential VCO is used in the PLL. Also, CMOS inverter is used as variable capacitor to tune the frequency of VCO with control voltage. The proposed PLL is designed in a 180[Formula: see text]nm CMOS process with supply voltage of 1.8[Formula: see text]V. The phase noise of VCO is [Formula: see text][Formula: see text]dBc/Hz at an offset frequency of 100[Formula: see text]MHz. The reference clock of 25[Formula: see text]MHz synthesizes the output clock of 1.6[Formula: see text]GHz with rms jitter of 0.642[Formula: see text]ps.

scholarly journals A Ku-Band Fractional-N Frequency Synthesizer with Adaptive Loop Bandwidth Control

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 109
Author(s):  
Youming Zhang ◽  
Xusheng Tang ◽  
Zhennan Wei ◽  
Kaiye Bao ◽  
Nan Jiang
Keyword(s):  
Phase Noise ◽  
Frequency Synthesizer ◽  
Frequency Tuning ◽  
Cmos Technology ◽  
Voltage Controlled Oscillator ◽  
Loop Filter ◽  
Chip Area ◽  
Loop Bandwidth ◽  
Bandwidth Control ◽  
Ku Band

This paper presents a Ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control (ALBC) to speed up the lock settling process and meanwhile ensure better phase noise and spur performance. The theoretical analysis and circuits implementation are discussed in detail. Other key modules of the frequency synthesizer such as broadband voltage-controlled oscillator (VCO) with auto frequency calibration (AFC) and programable frequency divider/charge pump/loop filter are designed for integrity and flexible configuration. The proposed frequency synthesizer is fabricated in 0.13 μm CMOS technology occupying 1.14 × 1.18 mm2 area including ESD/IOs and pads, and the area of the ALBC is only 55 × 76 μm2. The out frequency can cover from 11.37 GHz to 14.8 GHz with a frequency tuning range (FTR) of 26.2%. The phase noise is −112.5 dBc/Hz @ 1 MHz and −122.4 dBc/Hz @ 3 MHz at 13 GHz carrier frequency. Thanks to the proposed ALBC, the lock-time can be shortened by about 30% from about 36 μs to 24 μs. The chip area and power consumption of the proposed ALBC technology are slight, but the beneficial effect is significant.

scholarly journals A Design of Wide-Range and Low Phase Noise Linear Transconductance VCO with 193.76 dBc/Hz FoMT for mm-Wave 5G Transceivers

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 935 ◽  
Author(s):  
Arash Hejazi ◽  
YoungGun Pu ◽  
Kang-Yoon Lee
Keyword(s):  
Phase Noise ◽  
Carrier Frequency ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Voltage Controlled Oscillator ◽  
Wide Range ◽  
Layout Area ◽  
Low Phase Noise

This paper presents a wide-range and low phase noise mm-Wave Voltage Controlled Oscillator (VCO) based on the transconductance linearization technique. The proposed technique eliminates the deep triode region of the active part of the VCO, and lowers the noise introduced by the gm-cell. The switch sizes inside the switched capacitor bank of the VCO are optimized to minimize the resistance of the switches while keeping the wide tuning range. A new layout technique shortens the routing of the VCO outputs, and lowers the parasitic inductance and resistance of the VCO routing. The presented method prevents the reduction of the quality factor of the tank due to the long routing. The proposed VCO achieves a discrete frequency tuning range, of 14 GHz to 18 GHz, through a linear coarse and middle switched capacitor array, and offers superior phase noise performance compared to recent state-of-the-art VCO architectures. The design is implemented in a 45 nm CMOS process and occupies a layout area (including output buffers) of 0.14 mm2. The power consumption of the VCO core is 24 mW from the power supply of 0.8 V. The post-layout simulation result shows the VCO achieves the phase noise performances of −87.2 dBc/Hz and −113 dBc/Hz, at 100 kHz and 1 MHz offset frequencies from the carrier frequency of 14 GHz, respectively. In an 18 GHz carrier frequency, the results are −87.4 dBc/Hz and −110 dBc/Hz, accordingly.

Low Phase Noise Voltage Controlled Oscillator Using Cascode and Current-Reuse Techniques for Radio Frequency Circuits

2013 ◽  
Vol 479-480 ◽  
pp. 513-516
Author(s):  
Shuo Chang Hsu ◽  
Meng Ting Hsu ◽  
Yu Tuan Hsu
Keyword(s):  
Phase Noise ◽  
Power Dissipation ◽  
Supply Voltage ◽  
Building Blocks ◽  
Voltage Controlled Oscillator ◽  
Ieee 802.11A ◽  
Current Reuse ◽  
Chip Fabrication ◽  
Offset Frequency ◽  
Low Phase Noise

The voltage-controlled-oscillator (VCO) is one of the most important building blocks in the system. The chip fabrication of VCO is made by TSMC 0.18μm 1P6M CMOS standard process. The chip presents a low power and low phase noise for IEEE 802.11a applications, the PMOS casecode and current-reuse cross-couple technology are designed to improve phase noise and reduce power. The measured results of phase noise is-120.87 dBc/Hz at 1MHz offset frequency from the carrier frequency 5.05 GHz, and operates frequency from 5.04 GHz to 5.895 GHz with a tuning range of 17.14%. Under supply voltage 1.65V, the core power dissipation is 4.05 mW.

scholarly journals On-Chip Voltage-Controlled Oscillator Based on a Center-Tapped Switched Inductor Using GaN-on-SiC HEMT Technology

Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 2928
Author(s):  
Hsuan-Ling Kao
Keyword(s):  
Phase Noise ◽  
Output Power ◽  
Tuning Range ◽  
Frequency Tuning ◽  
High Electron Mobility Transistors ◽  
Voltage Controlled Oscillator ◽  
High Electron ◽  
Electron Mobility Transistors ◽  
On Chip ◽  
Low Phase Noise

This study presents a voltage-controlled oscillator (VCO) in a cross-coupled pair configuration using a multi-tapped switched inductor with two switch-loaded transformers in 0.5 µm GaN technology. Two switch-loaded transformers are placed at the inner and outer portions of the multi-tapped inductor. All the switches are turned off to obtain the lowest sub-band. The outer transformer with three pairs of switches is turned on alternately to provide three sub-band modes. A pair of switches at the inner transformer provide a high-frequency band. Two switch-loaded transformers are turned on to provide the highest sub-band. Six modes are selected to provide a wide tuning range. The frequency tuning range (FTR) of the VCO is 27.8% from 3.81 GHz to 8.04 GHz with a varactor voltage from 13 V to 22 V. At a 1 MHz frequency offset from the carrier frequency of 4.27 GHz, the peak phase noise is −119.17 dBc/Hz. At a power supply of 12 V, the output power of the carrier at 4.27 GHz is 20.9 dBm. The figure of merit is −186.93 dB because the VCO exhibits a high output power, low phase noise, and wide FTR. To the best of the author’s knowledge, the FTR in VCOs made of GaN-based high electron mobility transistors is the widest reported thus far.

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