A Novel Low Line Regulation Voltage Reference with No Amplifier

2018 ◽  
Vol 27 (10) ◽  
pp. 1850152 ◽  
Author(s):  
Qiang Li Li ◽  
WanLing Deng ◽  
Xiao Yu Ma ◽  
JunKai Huang

A novel low line regulation voltage reference (VR) without an amplifier is presented in this paper. The design is achieved by subtracting two voltages which have the same temperature curves. All circuits use only one Bipolar Junction Transistor (BJT) to decrease the area greatly. Designed with the SMIC 0.18[Formula: see text][Formula: see text]m CMOS process, the simulation results show that the output voltage is 0.902[Formula: see text]V at TT process corner when the power supply is larger than 1.7[Formula: see text]V. The temperature coefficient (TC) is 3.6[Formula: see text]ppm/[Formula: see text]C to 7.4[Formula: see text]ppm/[Formula: see text]C at different power supplies and process corners. The simulated power supply rejection ratio (PSRR) is [Formula: see text]80[Formula: see text]dB at TT process corner when the power supply is 2.5[Formula: see text]V, and the PSRR at different process corners are almost the same. The line regulation of the proposed circuit is 0.005[Formula: see text]mV/V.

Author(s):  
Hayder Khaleel AL-Qaysi ◽  
Musaab Mohammed Jasim ◽  
Siraj Manhal Hameed

This paper presents the description and analysis of the design and HSPICE-based simulation results of very low-voltages (LVs) power supplies and high-performance specifications CMOS gate-driven (GD) operational amplifier (Op-Amp) circuit. The very LVs CMOS GD Op-Amp circuit designed using 90nm CMOS technology parameters and the folded cascode (FC) technique employed in the differential input stage. The HSPICE simulation results demonstrate that the overall gain is 73.1dB, the unity gain bandwidth is 14.9MHz, the phase margin is , the total power dissipation is 0.91mW, the output voltage swing is from 0.95V to 1V, the common-mode rejection ratio is dB, the equivalent input-referred noise voltage is 50.94  at 1MHz, the positive slew rate is 11.37 , the negative slew rate is 11.39 , the settling time is 137 , the positive power-supply rejection ratio is 74.2dB, and the negative power-supply rejection ratio is 80.1dB. The comparisons of simulation results at 1V and 0.814V power supplies’ voltages of the very LVs CMOS GD Op-Amp circuit demonstrate that the circuit functions with perfect performance specifications, and it is suitable for many considerable applications intended for very LVs CMOS Op-Amp circuits.


2014 ◽  
Vol 981 ◽  
pp. 66-69
Author(s):  
Ming Yuan Ren ◽  
En Ming Zhao

This paper presents a design and analysis method of a bandgap reference circuit. The Bandgap design is realized through the 0.18um CMOS process. Simulation results show that the bandgap circuit outputs 1.239V in the typical operation condition. The variance rate of output voltage is 0.016mV/°C? with the operating temperature varying from-60°C? to 160°C?. And it is 3.27mV/V with the power supply changes from 1.8V to 3.3V.


2014 ◽  
Vol 989-994 ◽  
pp. 1165-1168
Author(s):  
Qian Neng Zhou ◽  
Yun Song Li ◽  
Jin Zhao Lin ◽  
Hong Juan Li ◽  
Chen Li ◽  
...  

A high-order bandgap voltage reference (BGR) is designed by adopting a current which is proportional to absolute temperature T1.5. The high-order BGR is analyzed and simulated in SMIC 0.18μm CMOS process. Simulation results show that the designed high-order BGR achieves temperature coefficient of 2.54ppm/°C when temperature ranging from-55°C to 125°C. The high-order BGR at 10Hz, 100Hz, 1kHz, 10kHz and 100kHz achieves, respectively, the power supply rejection ratio of-64.01dB, -64.01dB, -64dB, -63.5dB and-53.2dB. When power supply voltage changes from 1.7V to 2.5V, the output voltage deviation of BGR is only 617.6μV.


2017 ◽  
Vol 26 (09) ◽  
pp. 1750127 ◽  
Author(s):  
Gongyuan Zhao ◽  
Mao Ye ◽  
Yiqiang Zhao ◽  
Kai Hu ◽  
Ruishan Xin

This paper presents a bandgap voltage reference (BGR), utilizing high order curvature-compensated technique with the temperature dependent resistor. Based on an improved error amplifier, [Formula: see text]80[Formula: see text]dB power supply rejection (PSR) @1[Formula: see text]kHz is achieved without additional complicated circuits. The circuit is fabricated in a standard [Formula: see text]m CMOS process, consuming 50[Formula: see text][Formula: see text]A at 25[Formula: see text]C with a supply voltage of 3.3[Formula: see text]V. Simulation results show that the proposed BGR can achieve a temperature coefficient as low as 1.18[Formula: see text]ppm/[Formula: see text]C over the temperature range from [Formula: see text]C to 120[Formula: see text]C. Monte Carlo simulation and Experimental Results validate the design.


Author(s):  
Anass SLAMTI ◽  
Youness MEHDAOUI ◽  
Driss CHENOUNI ◽  
Zakia LAKHLIAI

<span lang="EN-US">A sub-1V opamp based β-multiplier CMOS bandgap voltage reference (BGVR) with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is proposed in this paper. A current mode regulator scheme is inserted to isolate the supply voltage of the operational amplifier (opamp) and the supply voltage of the BGVR core from the supply voltage source in order to reduce ripple sensitivity and to achieve a high PSRR. The proposed circuit is designed and simulated in 0.18-μm standard CMOS technology. The proposed voltage reference delivers an output voltage of 634.6mV at 27°C. Tthe measurement temperature coefficient is 22,3ppm/°C over temperature range -40°C to 140°C, power supply rejection ratio is -93dB at 10kHz and -71dB at 1MHz and a line regulation of 104μV/V is achieved over supply voltage range 1.2V to 1.8V. The layout area of the proposed circuit is 0.0337mm<sup>2</sup>. The proposed sub-1V bandgap voltage reference can be used as an internal voltage reference in low power LDO regulators and switching regulators.</span>


Electronics ◽  
2019 ◽  
Vol 8 (2) ◽  
pp. 213 ◽  
Author(s):  
Hongwei Yue ◽  
Xiaofei Sun ◽  
Junxin Liu ◽  
Weilin Xu ◽  
Haiou Li ◽  
...  

A dual-output voltage reference circuit with two reference voltages of 281 mV (Vref1) and 320.5 mV (Vref2) is presented in this paper. With a novel and precise circuit structure, the proposed circuit, operating in the subthreshold region, integrates two different output voltages into a circuit to form a dual-output voltage reference, and cascode current mirrors are used to enhance the power supply rejection ratio (PSRR). The proposed circuit was designed in a standard 0.18-µm CMOS process and has a series of attractive features: low-temperature coefficient (TC), high-PSRR, low-Line sensitivity (LS), small-chip area and low-power consumption. Monte Carlo simulations for 2000 samples showed that the output voltages 281 mV and 320.5 mV had a variation coefficient of 1.73% and 1.44%, respectively. The minimum power consumption was 84.1 nW at 0.9 V supply, proving that the circuit is suitable for portable biomedical application. The active area of the proposed voltage reference was only 0.0086 mm2.


2014 ◽  
Vol 644-650 ◽  
pp. 3575-3578
Author(s):  
Zheng Da Li ◽  
Lin Xie

This paper designed a new band-gap voltage reference circuit with two-stage temperature compensation.It realizes non-linear temperature compensation by using NMOS-pipe leakage current and increases the power supply rejection ratio of the band-gap voltage reference source by introducing negative feedback between the operational amplifier and the power supply. What is more, the paper simulates the band-gap voltage reference source based on CSMC 0.5μm CMOS technique. The result as follow: the band-gap voltage reference source has the temperature coefficient of 8.2ppm/oC among-40-120oC with the supply voltage of 3V, the low-frequency power supply rejection ratio is 83dBat 27oC and the power supply rejection ratio is 71dB in 1KHz, the output voltage regulation is 1.05mV/V in the supply voltage range from 2.4V to 5V.


2019 ◽  
Vol 17 (10) ◽  
pp. 777-783
Author(s):  
Shishu Pal ◽  
Ashutosh Nandi

This paper describes a compact, low voltage and high power supply rejection ratio (PSRR) Bandgap voltage reference circuit by using subthreshold MOSFETs. The proposed reference circuit is implemented using 0.18 μm CMOS technology. The circuit simulation is performed using the Cadence Spectre and Synopsys Hspice. The circuit generates the mean output reference voltage of 164 mV and temperature coefficient of 15.5 ppm/°C when temperature is swept from –40 °C to 120 °C at power supply of 1.2 V. For better PSRR, a feed forward mechanism is used. The proposed design has only single transistor for start-up circuit. The measured settling time for output reference voltage is observed to be less than 4 μs. No filtering capacitor is used to improve the PSRR, which is –97 dB up to 1 MHz and subsequently reduces to –47.5 dB at 158 MHz.


2014 ◽  
Vol 644-650 ◽  
pp. 3682-3685
Author(s):  
Xiao Zong Huang ◽  
Lun Cai Liu ◽  
Wen Gang Huang ◽  
Jun Luo ◽  
Dong Mei Zhu

An integrated ramp generator is presented in this paper. For traditional implementations, the amplitude clamp is realized with zener diode to limit the output voltage to ±VZ, while the zener diode is not available for standard CMOS process. The transmission gate is utilized to make the output voltage in the determined range. The reference voltage is provided by a bandgap voltage reference with temperature compensation, which guarantees the temperature stabilization of the frequency of the ramp generator. The ramp generator was fabricated in a commercial CMOS process. The frequency of 44kHz is achieved under the power supply of 3.5V, and the frequency variation of 41kH to 46kHz with the power supply of 3.3V to 5V.


2013 ◽  
Vol 427-429 ◽  
pp. 1097-1100
Author(s):  
Qian Neng Zhou ◽  
Rong Xue ◽  
Hong Juan Li ◽  
Jin Zhao Lin ◽  
Yun Song Li ◽  
...  

In this paper, a low temperature coefficient bandgap voltage (BGR) is designed for A/D converter by adopting piecewise-linear compensation technique. The designed BGR is analyzed and simulated in SMIC 0.18μm CMOS process. Simulation results show that the PSRR of the designed BGR achieves-72.51dB, -72.49dB, and-70.58dB at 10Hz, 100Hz and 1kHz respectively. The designed BGR achieve the temperature coefficient of 1.57 ppm/°C when temperature is in the range from-35°C to 125°C. When power supply voltage VDD changes from 1V to 7V, the deviation of the designed BGR output voltage VREF is only 4.465μV.


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