scholarly journals Design of very low-voltages and high-performance CMOS gate-driven operational amplifier

2020 ◽  
Vol 20 (2) ◽  
pp. 670
Author(s):  
Hayder Khaleel AL-Qaysi ◽  
Musaab Mohammed Jasim ◽  
Siraj Manhal Hameed
Keyword(s):  
Power Supply ◽  
Operational Amplifier ◽  
High Performance ◽  
Power Supplies ◽  
Slew Rate ◽  
Op Amp ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Performance Specifications ◽  
Simulation Results

This paper presents the description and analysis of the design and HSPICE-based simulation results of very low-voltages (LVs) power supplies and high-performance specifications CMOS gate-driven (GD) operational amplifier (Op-Amp) circuit. The very LVs CMOS GD Op-Amp circuit designed using 90nm CMOS technology parameters and the folded cascode (FC) technique employed in the differential input stage. The HSPICE simulation results demonstrate that the overall gain is 73.1dB, the unity gain bandwidth is 14.9MHz, the phase margin is , the total power dissipation is 0.91mW, the output voltage swing is from 0.95V to 1V, the common-mode rejection ratio is dB, the equivalent input-referred noise voltage is 50.94  at 1MHz, the positive slew rate is 11.37 , the negative slew rate is 11.39 , the settling time is 137 , the positive power-supply rejection ratio is 74.2dB, and the negative power-supply rejection ratio is 80.1dB. The comparisons of simulation results at 1V and 0.814V power supplies’ voltages of the very LVs CMOS GD Op-Amp circuit demonstrate that the circuit functions with perfect performance specifications, and it is suitable for many considerable applications intended for very LVs CMOS Op-Amp circuits.

A Novel Low Line Regulation Voltage Reference with No Amplifier

2018 ◽  
Vol 27 (10) ◽  
pp. 1850152 ◽  
Author(s):  
Qiang Li Li ◽  
WanLing Deng ◽  
Xiao Yu Ma ◽  
JunKai Huang
Keyword(s):  
Power Supply ◽  
Output Voltage ◽  
Power Supplies ◽  
Cmos Process ◽  
Voltage Reference ◽  
Bipolar Junction Transistor ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Junction Transistor ◽  
Simulation Results

A novel low line regulation voltage reference (VR) without an amplifier is presented in this paper. The design is achieved by subtracting two voltages which have the same temperature curves. All circuits use only one Bipolar Junction Transistor (BJT) to decrease the area greatly. Designed with the SMIC 0.18[Formula: see text][Formula: see text]m CMOS process, the simulation results show that the output voltage is 0.902[Formula: see text]V at TT process corner when the power supply is larger than 1.7[Formula: see text]V. The temperature coefficient (TC) is 3.6[Formula: see text]ppm/[Formula: see text]C to 7.4[Formula: see text]ppm/[Formula: see text]C at different power supplies and process corners. The simulated power supply rejection ratio (PSRR) is [Formula: see text]80[Formula: see text]dB at TT process corner when the power supply is 2.5[Formula: see text]V, and the PSRR at different process corners are almost the same. The line regulation of the proposed circuit is 0.005[Formula: see text]mV/V.

Rack Server Solution in Data Center

2015 ◽  
Author(s):  
Sheng Kang ◽  
Guofeng Chen ◽  
Chun Wang ◽  
Ruiquan Ding ◽  
Jiajun Zhang ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Supply ◽  
Data Center ◽  
Power Efficiency ◽  
High Performance ◽  
High Efficiency ◽  
High Growth ◽  
General Purpose ◽  
Power Supplies

With the advent of big data and cloud computing solutions, enterprise demand for servers is increasing. There is especially high growth for Intel based x86 server platforms. Today’s datacenters are in constant pursuit of high performance/high availability computing solutions coupled with low power consumption and low heat generation and the ability to manage all of this through advanced telemetry data gathering. This paper showcases one such solution of an updated rack and server architecture that promises such improvements. The ability to manage server and data center power consumption and cooling more completely is critical in effectively managing datacenter costs and reducing the PUE in the data center. Traditional Intel based 1U and 2U form factor servers have existed in the data center for decades. These general purpose x86 server designs by the major OEM’s are, for all practical purposes, very similar in their power consumption and thermal output. Power supplies and thermal designs for server in the past have not been optimized for high efficiency. In addition, IT managers need to know more information about servers in order to optimize data center cooling and power use, an improved server/rack design needs to be built to take advantage of more efficient power supplies or PDU’s and more efficient means of cooling server compute resources than from traditional internal server fans. This is the constant pursuit of corporations looking at new ways to improving efficiency and gaining a competitive advantage. A new way to optimize power consumption and improve cooling is a complete redesign of the traditional server rack. Extracting internal server power supplies and server fans and centralizing these within the rack aims to achieve this goal. This type of design achieves an entirely new low power target by utilizing centralized, high efficiency PDU’s that power all servers within the rack. Cooling is improved by also utilizing large efficient rack based fans for airflow to all servers. Also, opening up the server design is to allow greater airflow across server components for improved cooling. This centralized power supply breaks through the traditional server power limits. Rack based PDU’s can adjust the power efficiency to a more optimum point. Combine this with the use of online + offline modes within one single power supply. Cold backup makes data center power to achieve optimal power efficiency. In addition, unifying the mechanical structure and thermal definitions within the rack solution for server cooling and PSU information allows IT to collect all server power and thermal information centrally for improved ease in analyzing and processing.

A Design of Low Temperature Dependence Voltage Reference Circuit for PWM Controller

2013 ◽  
Vol 310 ◽  
pp. 448-452
Author(s):  
Zhi Chao Zhao ◽  
Tie Feng Wu ◽  
Jing Li ◽  
Li Min Li ◽  
Qie Pan ◽  
...  
Keyword(s):  
Low Temperature ◽  
Temperature Dependence ◽  
High Performance ◽  
Voltage Reference ◽  
Zener Diode ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Bipolar Voltage ◽  
Compensation Principle ◽  
Reference Circuit

In order to provide steady voltage for PWM controller, a design of bipolar voltage reference circuit with high performance is presented. The circuit based on the compensation principle between Zener diode and B-E junction of triode is used in PWM controller and can bring out multi-way steady voltages, moreover, there is a high power supply rejection ratio (PSRR) and low temperature dependence. The results of simulation and test in Candence with bipolar process of HuaYue SB45 show that the temperature coefficient is about 1.2ppm/°C in the temperature range -55~125°C. The line regulation is about 0.4mV/V in 8~30V and the PSRR is 77.54dB. The design of circuit can satisfy the requirements of PWM controller.

A Bandgap Reference without Passive Components Based on Standard CMOS

2013 ◽  
Vol 475-476 ◽  
pp. 1679-1684
Author(s):  
Ye Chao Sun ◽  
Zhuo Lei Huang ◽  
Wei Bing Wang
Keyword(s):  
Power Supply ◽  
Supply Voltage ◽  
Inverse Function ◽  
Function Technique ◽  
Bandgap Reference ◽  
Micro Electro Mechanical Systems ◽  
Passive Components ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Temperature Ranges

A bandgap reference without passive components based on standard CMOS is proposed. Using an improved inverse-function technique without any curvature-compensated techniques, two reference voltages are got in different temperature ranges. One is 1.56V with a temperature coefficient of 9.2ppm/°C in the range [0, 14 °C at 3.3V supply voltage, and the other is 1.546V with 47ppm/°C in [-25, 15 °C at 3.3V. Its PSRR (power supply rejection ratio) is below-60dB at 10kHz, and it is quite suitable for integration in processing circuits of MEMS (micro-electro-mechanical systems) devices.

Design of Hysteresis Controlled Single-Inductor Multi-Output DC-DC Converter

2015 ◽  
Vol 643 ◽  
pp. 69-77 ◽  
Author(s):  
Shunsuke Tanaka ◽  
Tatsunori Nagashima ◽  
Yasunori Kobori ◽  
Kotaro Kaneya ◽  
Takahiro Sakai ◽  
...  
Keyword(s):  
Power Supply ◽  
High Performance ◽  
Low Cost ◽  
Power Supplies ◽  
Control Methods ◽  
Supply Circuit ◽  
Power Supply Circuit ◽  
Multiple Power ◽  
Hysteresis Control

This Paper Describes Application of the Hysteresis Control to the Single-Inductordual-Output (SIDO) Power Supply Circuit to Realize High Performance, Low Cost and Small Sizepower Supply Circuits. the Sidos can Realize Small Number of Inductors (hence Small Size Andlow Cost) in the System where Multiple Power Supplies are Required, but their Performance Isnot Very Good if Conventional SIDO Control Methods are Used. we Show with Simulation Andexperiment that the Hysteresis Control can Realize High Performance SIDO Converters.

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