Locally Active Memristor with Three Coexisting Pinched Hysteresis Loops and Its Emulator Circuit

2020 ◽  
Vol 30 (13) ◽  
pp. 2050184
Author(s):  
Minghao Zhu ◽  
Chunhua Wang ◽  
Quanli Deng ◽  
Qinghui Hong
Keyword(s):  
Active Region ◽  
Chaotic System ◽  
Piecewise Linear ◽  
Chaotic Oscillation ◽  
Hysteresis Loops ◽  
State Equation ◽  
The Novel ◽  
Oscillation System ◽  
Memristor Emulator ◽  
Pinched Hysteresis

Locally active memristors with multiple coexisting pinched hysteresis loops have attracted the attention of researchers. However, the currently reported multiple coexisting pinched hysteresis loops memristors are obtained by adding additional piecewise-linear terms into the original Chua corsage memristor. This paper proposes a novel locally active memristor by introducing a polynomial characteristic function into the state equation. The novel memristor has three coexisting pinched hysteresis loops, large relative range of active region and simple emulator circuit. The characteristics of the novel memristor such as power-off plot, coexisting pinched hysteresis loops and DC [Formula: see text]–[Formula: see text] plot are studied. The memristor is used in a Chua chaotic system to investigate the effects of locally active characteristic on the chaotic oscillation system. Furthermore, the memristor emulator and chaotic system are designed and implemented by commercial circuit elements. The hardware experiments are consistent with numerical simulations.

scholarly journals A S-Type Bistable Locally-Active Memristor and Its Application in Oscillator Circuit

2021 ◽  
Author(s):  
Chunlai Li ◽  
Haodong Li ◽  
Wenwu Xie ◽  
Jianrong Du
Keyword(s):  
Active Region ◽  
Analog Circuit ◽  
Initial Conditions ◽  
Chaotic Oscillation ◽  
Hysteresis Loops ◽  
Analysis Method ◽  
Oscillator Circuit ◽  
Small Signal Analysis ◽  
Pinched Hysteresis ◽  
Signal Analysis Method

Abstract In this paper, a S-type memristor with tangent nonlinearity is proposed. The introduced memristor can generate two kinds of stable pinched hysteresis loops with initial conditions from two flanks of the initial critical point. The power-off plot verifies that the memristor is nonvolatile, and the DC V-I plot shows that the memristor is locally active with the locally-active region symmetrical about the origin. The equivalent circuit of the memristor, derived by small-signal analysis method, is used to study the dynamics near the operating point in the locally-active region. Owing to the bistable and locally-active properties and S-type DC V-I curve, this memristor is called S-type BLAM for short. Then, a new Wien-bridge oscillator circuit is designed by substituting one of its resistances with S-type BLAM. It find that the circuit system can produce chaotic oscillation and complex dynamic behavior, which is further confirmed by analog circuit experiment.

Dynamics, Synchronization and Electronic Implementations of a New Lorenz-like Chaotic System with Nonhyperbolic Equilibria

2019 ◽  
Vol 29 (14) ◽  
pp. 1950197 ◽  
Author(s):  
P. D. Kamdem Kuate ◽  
Qiang Lai ◽  
Hilaire Fotsin
Keyword(s):  
Chaotic System ◽  
Chaotic Systems ◽  
Lorenz System ◽  
Chaotic Behavior ◽  
Piecewise Linear ◽  
Period Doubling ◽  
Adaptive Synchronization ◽  
The Novel ◽  
Algebraic Equations ◽  
The Lorenz System

The Lorenz system has attracted increasing attention on the issue of its simplification in order to produce the simplest three-dimensional chaotic systems suitable for secure information processing. Meanwhile, Sprott’s work on elegant chaos has revealed a set of 19 chaotic systems all described by simple algebraic equations. This paper presents a new piecewise-linear chaotic system emerging from the simplification of the Lorenz system combined with the elegance of Sprott systems. Unlike the majority, the new system is a non-Shilnikov chaotic system with two nonhyperbolic equilibria. It is multiplier-free, variable-boostable and exclusively based on absolute value and signum nonlinearities. The use of familiar tools such as Lyapunov exponents spectra, bifurcation diagrams, frequency power spectra as well as Poincaré map help to demonstrate its chaotic behavior. The novel system exhibits inverse period doubling bifurcations and multistability. It has only five terms, one bifurcation parameter and a total amplitude controller. These features allow a simple and low cost electronic implementation. The adaptive synchronization of the novel system is investigated and the corresponding electronic circuit is presented to confirm its feasibility.

The Design and Realization of a Hyper-Chaotic Circuit Based on a Flux-Controlled Memristor with Linear Memductance

2017 ◽  
Vol 27 (03) ◽  
pp. 1850038 ◽  
Author(s):  
Chunhua Wang ◽  
Ling Zhou ◽  
Renping Wu
Keyword(s):  
Chaotic System ◽  
Circuit Simulation ◽  
Piecewise Linear ◽  
Chaotic Circuit ◽  
Multiple Attractors ◽  
Dynamical Behaviors ◽  
Memristive System ◽  
Pinched Hysteresis Loop ◽  
The Lorenz System ◽  
Pinched Hysteresis

In this paper, a flux-controlled memristor with linear memductance is proposed. Compared with the memristor with piecewise linear memductance and the memristor with smooth continuous nonlinearity memductance which are widely used in the study of memristive chaotic system, the proposed memristor has simple mathematical model and is easy to implement. Multisim circuit simulation and breadboard experiment are realized, and the memristor can exhibit a pinched hysteresis loop in the voltage–current plane when driven by a periodic voltage. In addition, a new hyper-chaotic system is presented in this paper by adding the proposed memristor into the Lorenz system. The transient chaos and multiple attractors are observed in this memristive system. The dynamical behaviors of the proposed system are analyzed by equilibria, Lyapunov exponents, bifurcation diagram and phase portrait. Finally, an electronic circuit is designed to implement the hyper-chaotic memristive system.

scholarly journals A Novel Floating Memristor Emulator with Minimal Components

2017 ◽  
Vol 2017 ◽  
pp. 1-12 ◽  
Author(s):  
Zhijun Li ◽  
Yicheng Zeng ◽  
Minglin Ma
Keyword(s):  
Mathematical Model ◽  
Hysteresis Loops ◽  
Experimental Tests ◽  
Operational Amplifiers ◽  
Current Feedback ◽  
Analog Multipliers ◽  
Current Feedback Operational Amplifiers ◽  
Memristor Emulator ◽  
The Mathematical Model ◽  
Pinched Hysteresis

A new floating emulator for the flux-controlled memristor is introduced in this paper. The proposed emulator circuit is very simple and consists of only two current feedback operational amplifiers (CFOAs), two analog multipliers, three resistors, and two capacitors. The emulator can be configured as an incremental or decremental type memristor by using an additional switch. The mathematical model of the emulator is derived to characterize its behavior. The hysteresis behavior of the emulator is discussed in detail, showing that the pinched hysteresis loops in v-i plane depend not only on the amplitude-to-frequency ratio of the exciting signal but also on the time constant of the emulator circuit itself. Experimental tests are provided to validate the emulator’s workability.

scholarly journals A fractional-order multistable locally-active memristor and its chaotic system with transient transition, state jump

2021 ◽  
Author(s):  
Xie Wenli ◽  
Chunhua Wang ◽  
Lin Hairong
Keyword(s):  
Fractional Order ◽  
Chaotic System ◽  
Circuit Simulation ◽  
Equilibrium Points ◽  
Chaotic Oscillation ◽  
Hysteresis Loops ◽  
Active Regions ◽  
Period 2 ◽  
Theoretical And Numerical Analysis ◽  
Memory Characteristics

Abstract Fractional calculus is closer to reality and has the same memory characteristics as memristor. Therefore, a fractional-order multistable locally active memristor is proposed for the first time in this paper, which has infinitely many coexisting pinched hysteresis loops under different initial states and wide locally active regions. Through the theoretical and numerical analysis, it is found that the fractional-order memristor has stronger locally active and memory characteristics and wider nonvolatile ranges than the integer-order memristor. Furthermore, this fractional-order memristor is applied in a chaotic system. It is found that oscillations occur only within the locally active regions. This chaotic system not only has complex and rich nonlinear dynamics such as infinitely many discrete equilibrium points, multistability, anti-monotonicity but also produces two new phenomena that have not been found in other chaotic systems after neglecting some initial transients. The first one is transient transition: the behavior of transient chaotic and transient period transition alternately occurring. The second is state jump: the behavior of period-4 oscillation or chaotic oscillation jumping to period-2 oscillation.Finally, the circuit simulation of fractional-order multistable locally active memristive chaotic system using PSIM is carried out to verify the validity of the numerical simulation results.

scholarly journals Ultimate Bound of a 3D Chaotic System and Its Application in Chaos Synchronization

2014 ◽  
Vol 2014 ◽  
pp. 1-9
Author(s):  
Jiezhi Wang ◽  
Qing Zhang ◽  
Zengqiang Chen ◽  
Hang Li
Keyword(s):  
Chaotic System ◽  
Chaos Synchronization ◽  
Three Dimensional ◽  
Boundary Region ◽  
Cross Product ◽  
State Equation ◽  
Linear Coefficient ◽  
Analytical Expression ◽  
Product Term ◽  
Cross Product Term

Two ellipsoidal ultimate boundary regions of a special three-dimensional (3D) chaotic system are proposed. To this chaotic system, the linear coefficient of theith state variable in theith state equation has the same sign; it also has two one-order terms and one quadratic cross-product term in each equation. A numerical solution and an analytical expression of the ultimate bounds are received. To get the analytical expression of the ultimate boundary region, a new result of one maximum optimization question is proved. The corresponding ultimate boundary regions are demonstrated through numerical simulations. Utilizing the bounds obtained, a linear controller is proposed to achieve the complete chaos synchronization. Numerical simulation exhibits the feasibility of the designed scheme.

scholarly journals CMOS Realization of All-Positive Pinched Hysteresis Loops

Complexity ◽  
2017 ◽  
Vol 2017 ◽  
pp. 1-15 ◽  
Author(s):  
B. J. Maundy ◽  
A. S. Elwakil ◽  
C. Psychalinos
Keyword(s):  
Hysteresis Loop ◽  
Detailed Analysis ◽  
Hysteresis Loops ◽  
Nonlinear Circuits ◽  
Experimental Results ◽  
First Order ◽  
Pinched Hysteresis Loop ◽  
A Charge ◽  
Pinched Hysteresis ◽  
Nmos Transistors

Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. We show the equivalency to a charge-controlled resistance (memristance) in a decremental state via detailed analysis. Simulation and experimental results verify the proposed theory.

New Grounded and Floating Memristor-Less Meminductor Emulators Using VDTA and CDBA

2021 ◽  
pp. 2150283
Author(s):  
Nisha Yadav ◽  
Shireesh Kumar Rai ◽  
Rishikesh Pandey
Keyword(s):  
Adaptive Learning ◽  
Hysteresis Loops ◽  
Cmos Technology ◽  
Chaotic Oscillator ◽  
Simulation Tool ◽  
Analog Multiplier ◽  
Transconductance Amplifier ◽  
Simulation Results ◽  
Pinched Hysteresis

In this paper, new memristor-less meminductor emulators have been proposed using voltage differencing transconductance amplifier (VDTA), current differencing buffered amplifier (CDBA) and a grounded capacitor. The proposed decremental/incremental meminductor emulators have been realized in both grounded and floating types of configurations. In the proposed meminductor emulators, analog multiplier, memristor and passive resistors are not used which result in simpler configurations. The pinched hysteresis loops are maintained up to 2[Formula: see text]MHz for both decremental and incremental configurations of meminductor emulators. The behaviors of decremental and incremental meminductor emulators have been analyzed after applying input pulses. The obtained results verify the performances as decremental and incremental meminductor emulators. The simulation results have been obtained using Mentor Graphics Eldo simulation tool with 180[Formula: see text]nm CMOS technology parameters. To verify the performances of the proposed meminductor emulators, adaptive learning circuit and chaotic oscillator have been designed. The performances of the proposed meminductor emulators are compared with other meminductor emulators reported in the literature.

scholarly journals Chaos-Based Application of a Novel Multistable 5D Memristive Hyperchaotic System with Coexisting Multiple Attractors

Complexity ◽  
2020 ◽  
Vol 2020 ◽  
pp. 1-19 ◽  
Author(s):  
Fei Yu ◽  
Li Liu ◽  
Shuai Qian ◽  
Lixiang Li ◽  
Yuanyuan Huang ◽  
...  
Keyword(s):  
Image Encryption ◽  
Chaotic System ◽  
Random Number Generator ◽  
Phase Portraits ◽  
Hyperchaotic System ◽  
The Novel ◽  
Multiple Attractors ◽  
Period 2 ◽  
Different Types ◽  
System Designs

Novel memristive hyperchaotic system designs and their engineering applications have received considerable critical attention. In this paper, a novel multistable 5D memristive hyperchaotic system and its application are introduced. The interesting aspect of this chaotic system is that it has different types of coexisting attractors, chaos, hyperchaos, periods, and limit cycles. First, a novel 5D memristive hyperchaotic system is proposed by introducing a flux-controlled memristor with quadratic nonlinearity into an existing 4D four-wing chaotic system as a feedback term. Then, the phase portraits, Lyapunov exponential spectrum, bifurcation diagram, and spectral entropy are used to analyze the basic dynamics of the 5D memristive hyperchaotic system. For a specific set of parameters, we find an unusual metastability, which shows the transition from chaotic to periodic (period-2 and period-3) dynamics. Moreover, its circuit implementation is also proposed. By using the chaoticity of the novel hyperchaotic system, we have developed a random number generator (RNG) for practical image encryption applications. Furthermore, security analyses are carried out with the RNG and image encryption designs.

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