scholarly journals Improved 25-level inverter topology with reduced part count for PV grid-tie applications

Author(s):  
Radouane Majdoul ◽  
Abelwahed Touati ◽  
Abderrahmane Ouchatti ◽  
Abderrahim Taouni ◽  
Elhassane Abdelmounim

<span lang="EN-US">A new bidirectional multilevel inverter topology with a high number of voltage levels with a very reduced number of power components is proposed in this paper. Only TEN power switches and four asymmetric DC voltage sources are used to generate 25 voltage levels in this new topology. The proposed multilevel converter is more suitable for e-mobility and photovoltaic applications where the overall energy source can be composed of a few units/associations of several basic source modules. Several benefits are provided by this new topology: Highly sinusoidal current and voltage waveforms, low Total Harmonic Distortion, very low switching losses, and minimum cost and size of the device. For optimum control of this 25-level voltage inverter, a special Modified Hybrid Modulation technique is performed. The proposed 25-level inverter is compared to various topologies published recently in terms of cost, the number of active power switches, clamped diodes, flying capacitors, DC floating capacitors, and the number of DC voltage sources. This comparison clearly shows that the proposed topology is cost-effective, compact, and very efficient. The effectiveness and the good performance of the proposed multilevel power converter (with and without PWM control) are verified and checked by computational simulations.</span>

2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.


2022 ◽  
Vol 18 (1) ◽  
pp. 48-57
Author(s):  
Aws Al-Jrew ◽  
Jawad Mahmood ◽  
Ramzy Ali

In this article, a comparison of innovative multilevel inverter topology with standard topologies has been conducted. The proposed single phase five level inverter topology has been used for induction heating system. This suggested design generates five voltage levels with a fewer number of power switches. This reduction in number of switches decreases the switching losses and the number of driving circuits and reduce the complexity of control circuit. It also reduces the cost and size for the filter used. Analysis and comparison has been done among the conventional topologies (neutral clamped and cascade H-bridge multilevel inverters) with the proposed inverter topology. The analysis includes the total harmonic distortion THD, efficiency and overall performance of the inverter systems. The simulation and analysis have been done using MATLAB/ SIMULINK. The results show good performance for the proposed topology in comparison with the conventional topologies.


Author(s):  
Radouane Majdoul ◽  
Abelwahed Touati ◽  
Abderrahmane Ouchatti ◽  
Abderrahim Taouni ◽  
Elhassane Abdelmounim

<span lang="EN-US">Multilevel power converters are becoming increasingly used in several sectors: energy, grid-tie renewable energy systems, High voltage direct current (HVDC) power transmission, and a multitude of industrial applications. However, the multilevel converters consist of several drives and a high number of power switches, which leads to a considerable cost and an increased size of the device. Thus, a novel topology of a multilevel bidirectional inverter using a reduced number of semiconductor power components is proposed in this paper. Without any diode clamped or flying capacitor, only nine switches are used to generate nine voltage levels in this new topology. The proposed multilevel converter is compared with the conventional structures in terms of cost, the number of active power switches, clamped diodes, flying capacitors, DC floating capacitors, and the number of DC voltage sources. This comparative analysis shows that the proposed topology is suitable for many applications. For optimum control of this multilevel voltage inverter and to reduce switching losses in power semiconductors, a hybrid modulation technique based on fundamental frequency modulation and multi-carrier-based sinusoidal pulse-width modulation schemes is performed. The effectiveness of the proposed multilevel power converter is verified by simulation results.</span>


Multilevel inverters produced lot of interest in academia and industry as they are becoming feasible technology for number of applications. These are considered as the progressing power converter topologies. To generate a quality output waveform with minimum number of switches, reduced switch multilevel inverter topologies has come in focus. This paper introduces a modified symmetrical MLI with reduced component count thereby ensuring the minimum switching losses, reduced total harmonic distortion, Size and installation cost. By proper combination of switches it produces a staircase output waveform with low harmonic distortion. In this paper novel symmetrical inverter topology with reduced component count based on level shift phase opposition and disposition PWM (PODPWM) is proposed. The results are validated using MATLAB/SIMULINK.


2017 ◽  
Vol 7 (1.5) ◽  
pp. 209
Author(s):  
B.Vijaya Krishna ◽  
B. Venkata Prashanth ◽  
P. Sujatha

Multilevel Inverters (MLI) have very good features when compared to Inverters. But using more switches in the conventional configuration will reduce its application in a wider range. For that reason a modified 7-level MLI Topology is presented. This new topology consists of less number of switches that can be reduced to the maximum extent and a separate gate trigger circuit. This will reduce the switching losses, reduce the size of the multilevel inverter, and cost of installation. This new topology can be used in Electrical drives and renewable energy applications. Performance of the new MLI is tested via. Total harmonic distortion. This construction structure of this multilevel inverter topology can also be increased for 9-level, 11-level and so on and simulated by the use of MATLAB/SIMULINK. A separate Carrier Based PWM Technique is used for the pulse generation in this configuration.


In the couple of years, the demand of multilevel inverter has expeditiously increased in the field of utilization of electrical energy. Because the multilevel inverter is a key technology to integrate the different renewable energy sources (wind, solar etc) with the grid. In this research work, authors have configured a novel topology of nine level multilevel inverter has less number of switches with dc voltage sources. The presented approach has been designed to 9-level inverter with seven unidirectional switches with voltage sources. It comprises of an H-bridge which synthesize to ac voltage by utilizing almost all possible additive and subtractive cases of the voltage sources with its combinational power switches and generated optimal firing angles using selective harmonic elimination method with Genetic Algorithm to decrease the lower order harmonic present in the output voltage of the, which supplied by the presented nine-level inverter. It has been concluded that presented approach use a less number of power switches in drive circuit and the number of dc voltage sources also make a simple circuit and enhance the efficiency of the complete system


The study of single phase Switched Capacitors Multi Level Inverter (MLI) is used with Switched Capacitor Converter (SCC) units. The SCC is used to increase the input DC voltage by connecting capacitor in string and shunt. This increassed DC link voltage is converted in to multilevel i.e. 49 level AC output. This SCMLI topology is used to reduce the number of switches, diodes, isolated dc power supply and Total Harmonic Distortion (THD). The SCMLI provides 49 level output voltage using 14 power switches and 3 isolated power supply. The performance of the SCMLI topology is confirmed by using MATLAB simulation result


Author(s):  
Fethi Chouaf ◽  
Salah Saad

In the scope of this work, a new structure of the nine level inverter is proposed using a reduced number of power switches. This inverter is used as a shunt active power filter to compensate harmonic currents and the reactive power. The modeling and simulation of the proposed model were carried out in Matlab/Simulink environment. The simulation results show that the filtering performances were achieved despite the reduction of the switches number. It was found that the current waveform becomes purely sinusoidal with a reduction in the harmonic distortion rate (THD) to 2.68%. This implies good compensation of both harmonics and reactive power with a power factor closer to unity. Reducing the switches number allows reducing the switching losses and lowering the duration of the applied voltage supported by the semiconductors. The proposed topology also allows to get simple structure of the inverter with a reduced cost.


2012 ◽  
Vol 717-720 ◽  
pp. 1307-1310
Author(s):  
Krishna Shenai ◽  
Krushal Shah

Simple, physics-based, and accurate circuit models are reported for GaN power HEMTs and inductors; these models are then used to design high-performance chip-scale synchronous buck (SB) power converters to provide agile point-of-load (POL) low-voltage ( down to 1V) high-current (up to 10A) power to portable mobile devices from a battery. Excellent agreement between the measured and simulated results is demonstrated for load regulation for a 19V/1.2V, 800 kHz SB converter; for comparison, the same converter performance using the best commercially available state-of-the-art silicon power MOSFETs is also evaluated. It is shown that the conventional approach used for estimating power loss of a SB power converter is in error; a new application-specific Figure of Merit (FOM) for power switches is proposed that accounts for both input and output switching losses.


2020 ◽  
Vol 2 (2) ◽  
pp. 14-28
Author(s):  
Manoranjan A ◽  
Christober Asir Rajan C

A new multilevel inverter with less no of power switches is proposed. This is based on cascaded H-bridge topology. The design and analysis of 31-level reduced switch inverter with different modes of operation are presented in this paper. The proposed inverter is asymmetric in nature and it uses unequal DC voltage sources. PD-PWM modulation technique has been used here to get proper switching. The proposed idea has been validated through simulation and the received results provides better efficiency, less low order harmonics and less switching losses.


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