scholarly journals Ge N-Channel MOSFETs with ZrO2 Dielectric Achieving Improved Mobility

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Lulu Chou ◽  
Yan Liu ◽  
Yang Xu ◽  
Yue Peng ◽  
Huan Liu ◽  
...  
Keyword(s):  
Charge Density ◽  
Electron Mobility ◽  
Interfacial Layer ◽  
High Performance ◽  
Gate Dielectric ◽  
High Mobility ◽  
Post Treatment ◽  
The Other ◽  
Effective Electron ◽  
Inversion Charge

AbstractHigh-mobility Ge nMOSFETs with ZrO2 gate dielectric are demonstrated and compared against transistors with different interfacial properties of ozone (O3) treatment, O3 post-treatment and without O3 treatment. It is found that with O3 treatment, the Ge nMOSFETs with ZrO2 dielectric having a EOT of 0.83 nm obtain a peak effective electron mobility (μeff) of 682 cm2/Vs, which is higher than that of the Si universal mobility at the medium inversion charge density (Qinv). On the other hand, the O3 post-treatment with Al2O3 interfacial layer can provide dramatically enhanced-μeff, achieving about 50% μeff improvement as compared to the Si universal mobility at medium Qinv of 5 × 1012 cm−2. These results indicate the potential utilization of ZrO2 dielectric in high-performance Ge nMOSFETs.

scholarly journals Ge N-Channel MOSFETs with ZrO2 Dielectric Achieving the Improved Mobility

2021 ◽  
Author(s):  
Lulu Chou ◽  
Yan Liu ◽  
Yang Xu ◽  
Yue Peng ◽  
Huan Liu ◽  
...  
Keyword(s):  
Electron Mobility ◽  
Interfacial Layer ◽  
Gate Dielectric ◽  
Gate Dielectrics ◽  
High Mobility ◽  
Gate Insulator ◽  
Equivalent Thickness ◽  
Effective Electron ◽  
Drive Current ◽  
Inversion Charge

Abstract High mobility Ge nMOSFETs with ZrO2 gate dielectric are demonstrated and compared against transistors with Al2O3/ZrO2 , ZrO2, and O3 /ZrO 2 gate dielectrics. The Al2O3/ZrO2 provides for dramatically enhanced-effective electron mobility ( μeff ), boosting transistor drive current. Ge nMOSFETs with the Al2O3 /ZrO2 gate insulator achieve a 50% μeff improvement as compared to the Si universal mobility at an inversion charge density ( Qinv ) of 5 × 10 12 cm -2 . An Al2O3 interfacial layer leads to a boost in μeff but increases capacitance equivalent thickness (CET). Utilizing O3 oxidation of Ge surface, Al2O3 -free Ge nMOSFETs having a CET of 1.1 nm obtains a peak μ eff of 682 cm2 /Vs, which is higher than that of the Si universal mobility at the similar Qinv .

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

Engineering gate dielectric surface properties for enhanced polymer field-effect transistor performance

2015 ◽  
Vol 3 (47) ◽  
pp. 12267-12272 ◽  
Author(s):  
Yanlian Lei ◽  
Bo Wu ◽  
Wing-Kin Edward Chan ◽  
Furong Zhu ◽  
Beng S. Ong
Keyword(s):  
Surface Properties ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Gate Dielectric ◽  
High Mobility ◽  
Dielectric Surface ◽  
Effect Transistor

A high-performance “hybrid” dual-silane SAM enables the attainment of both a high mobility and on/off ratio, together with other desirable FET properties.

scholarly journals Graphene Oxide/Polystyrene Bilayer Gate Dielectrics for Low-Voltage Organic Field-Effect Transistors

2018 ◽  
Vol 9 (1) ◽  
pp. 2 ◽  
Author(s):  
Sooji Nam ◽  
Yong Jeong ◽  
Joo Kim ◽  
Hansol Yang ◽  
Jaeyoung Jang
Keyword(s):  
Graphene Oxide ◽  
Field Effect ◽  
High Performance ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Field Effect Transistors ◽  
High Mobility ◽  
Operating Voltage ◽  
Organic Field Effect Transistors ◽  
Gate Leakage

Here, we report on the use of a graphene oxide (GO)/polystyrene (PS) bilayer as a gate dielectric for low-voltage organic field-effect transistors (OFETs). The hydrophilic functional groups of GO cause surface trapping and high gate leakage, which can be overcome by introducing a layer of PS—a hydrophobic polymer—onto the top surface of GO. The GO/PS gate dielectric shows reduced surface roughness and gate leakage while maintaining a high capacitance of 37.8 nF cm−2. The resulting OFETs show high-performance operation with a high mobility of 1.05 cm2 V−1 s−1 within a low operating voltage of −5 V.

High Channel Mobility of 4H-SiC MOSFETs Fabricated by Over-Oxidation of the N-/Al-Coimplanted Surface Layer

2009 ◽  
Vol 615-617 ◽  
pp. 765-768 ◽  
Author(s):  
Sergey A. Reshanov ◽  
Svetlana Beljakowa ◽  
Thomas Frank ◽  
Bernd Zippelius ◽  
Michael Krieger ◽  
...  
Keyword(s):  
Surface Layer ◽  
Threshold Voltage ◽  
Hall Mobility ◽  
Electron Mobility ◽  
Room Temperature ◽  
High Mobility ◽  
Interface Traps ◽  
Effective Electron ◽  
Channel Mobility ◽  
Positive Threshold

Conventional MOSFETs and Hall-bar MOSFETs are fabricated side by side by over-oxidation of N-implanted or N-/Al-coimplanted 4H-SiC layers. It is demonstrated that the N-/Al-coimplanted MOSFETs possess a positive threshold voltage at room temperature and reach high values of the channel mobility. The effective electron mobility and Hall mobility in Hall-bar MOSFETs are 31 cm2/Vs and 150 cm2/Vs, respectively, indicating a high density of interface traps in spite of the excellent high mobility values.

scholarly journals High electron mobility in strained GaAs nanowires

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Leila Balaghi ◽  
Si Shan ◽  
Ivan Fotev ◽  
Finn Moebus ◽  
Rakesh Rana ◽  
...  
Keyword(s):  
Gallium Arsenide ◽  
Electron Mobility ◽  
High Performance ◽  
Room Temperature ◽  
High Mobility ◽  
Semiconductor Nanowires ◽  
Core Shell ◽  
High Electron ◽  
Bulk Crystals ◽  
Gaas Nanowires

AbstractTransistor concepts based on semiconductor nanowires promise high performance, lower energy consumption and better integrability in various platforms in nanoscale dimensions. Concerning the intrinsic transport properties of electrons in nanowires, relatively high mobility values that approach those in bulk crystals have been obtained only in core/shell heterostructures, where electrons are spatially confined inside the core. Here, it is demonstrated that the strain in lattice-mismatched core/shell nanowires can affect the effective mass of electrons in a way that boosts their mobility to distinct levels. Specifically, electrons inside the hydrostatically tensile-strained gallium arsenide core of nanowires with a thick indium aluminium arsenide shell exhibit mobility values 30–50 % higher than in equivalent unstrained nanowires or bulk crystals, as measured at room temperature. With such an enhancement of electron mobility, strained gallium arsenide nanowires emerge as a unique means for the advancement of transistor technology.

scholarly journals High-electron-mobility (370 cm2/Vs) polycrystalline Ge on an insulator formed by As-doped solid-phase crystallization

2019 ◽  
Vol 9 (1) ◽  
Author(s):  
M. Saito ◽  
K. Moto ◽  
T. Nishida ◽  
T. Suemasu ◽  
K. Toko
Keyword(s):  
Electron Mobility ◽  
High Performance ◽  
Solid Phase ◽  
High Mobility ◽  
State Density ◽  
High Electron ◽  
Flat Panel Displays ◽  
Solid Phase Crystallization ◽  
High Electron Mobility ◽  
As Doping

Abstract High-electron-mobility polycrystalline Ge (poly-Ge) thin films are difficult to form because of their poor crystallinity, defect-induced acceptors and low solid solubility of n-type dopants. Here, we found that As doping into amorphous Ge significantly influenced the subsequent solid-phase crystallization. Although excessive As doping degraded the crystallinity of the poly-Ge, the appropriate amount of As (~1020 cm−3) promoted lateral growth and increased the Ge grain size to approximately 20 μm at a growth temperature of 375 °C. Moreover, neutral As atoms in poly-Ge reduced the trap-state density and energy barrier height of the grain boundaries. These properties reduced grain boundary scattering and allowed for an electron mobility of 370 cm2/Vs at an electron concentration of 5 × 1018 cm−3 after post annealing at 500 °C. The electron mobility further exceeds that of any other n-type poly-Ge layers and even that of single-crystal Si wafers with n ≥ 1018 cm−3. The low-temperature synthesis of high-mobility Ge on insulators will provide a pathway for the monolithic integration of high-performance Ge-CMOS onto Si-LSIs and flat-panel displays.

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