A Narrow-band 8.7 GHz SiGe HBT LNA with a Passive Frequency Selective Feedback

Frequenz ◽  
2012 ◽  
Vol 66 (7-8) ◽  
Author(s):  
Stefan Gerlich ◽  
Peter Weger
Keyword(s):  
Noise Figure ◽  
Narrow Band ◽  
Supply Voltage ◽  
Low Noise ◽  
Sige Hbt ◽  
Frequency Selective ◽  
Noise Amplifier ◽  
Two Stages ◽  
Minimum Noise ◽  
Peak Gain

AbstractThis paper presents a low noise amplifier (LNA) with differential output using a passive frequency selective feedback. The introduced feedback stabilizes the amplifier at lower frequencies and improves the gain in the desired frequency band. The LNA consists of two stages. Additionally, a buffer at the output is added for measurements. The amplifier was implemented in a 0.35 μm SiGe technology. For measurements the LNA was bonded to a substrate. A peak gain of 28.1 dB and a minimum noise figure of 2.2 dB at a supply voltage of 3 V were achieved.

scholarly journals Performance Analysis of Inductive Source Degeneration Low Noise Amplifier using Multi-finger Technique

2019 ◽  
Vol 8 (9) ◽  
pp. 1636-1642
Keyword(s):  
Performance Analysis ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Common Source ◽  
Noise Amplifier ◽  
Minimum Noise ◽  
Minimum Noise Figure ◽  
Source Degeneration ◽  
Peak Gain

In the current paper, common source Low Noise Amplifier using inductively degenerated technique is designed to meet Radio Frequency (RF) range 2.45 GHz-2.85 GHz. The designed LNA is implemented using single and multi-finger transistor logic. The transistor geometry greater than 300 μm has been split into multiple fingers using multi-finger technology. The schematic is captured using ADS. The performance of LNA for various technologies has been analyzed using PTM 180 nm, PTM 130 nm and PTM 90 nm models. The amplifier with single transistor achieves minimum noise figure of 0.178 dB noise figure and maximum gain of 20.045 dB using 130 nm model technology for Bluetooth applications. Similarly 0.288 dB of minimum noise figure and peak gain of 17.971 dB are obtained using multi-finger MOSFET of PTM 90 nm technologyrespectively.The reverse isolation (S12) below -50 dB is achieved.

A Linear High Frequency gm Boosting Wideband LNA in 130 nm SiGe HBT with Minimum NF of 4.3 dB for WiGig Application

2021 ◽  
pp. 2250001
Author(s):  
Pournamy Sukumaran ◽  
Navin Kumar ◽  
Maran Ponnambalam
Keyword(s):  
High Frequency ◽  
Noise Figure ◽  
Supply Voltage ◽  
Low Noise ◽  
Intermediate Node ◽  
Sige Hbt ◽  
High Linearity ◽  
Bicmos Technology ◽  
Noise Amplifier ◽  
Boosting Technique

This paper presents an inductor less wideband low noise amplifier (LNA) with an area of 0.3[Formula: see text]mm2, using 130[Formula: see text]nm SiGe BiCMOS technology targeted for 5G WiGig wireless application. A [Formula: see text] boosting amplifier used at the intermediate node of the cascode topology to reduce the noise contribution of the common base (CB) transistor for the first time in SiGe HBT technology. Mathematical analysis shows that the proposed high frequency [Formula: see text] boosting technique on the CB transistor can be optimally tuned for either low NF or high linearity. Furthermore, the circuit incorporates variable capacitors for multimode capability, ensuring optimal performance in all four WiGig channels. Post layout EM simulation of the circuit shows that the resultant LNA has a maximum gain of 21.08[Formula: see text]dB with the [Formula: see text]3 dB frequency over 56[Formula: see text]GHz to 67.3[Formula: see text]GHz. The proposed LNA exhibits a minimum noise figure of 4.3[Formula: see text]dB and shows high linearity with an input referred [Formula: see text] of [Formula: see text]2.7[Formula: see text]dB. The designed when operated using supply voltage of 1.2[Formula: see text]V consumes a total dc power of 8.9[Formula: see text]mW.

Design of 3.1-10.6GHz CMOS LNA Based on Input Matching Technique of Common-Gate Topology

2013 ◽  
Vol 479-480 ◽  
pp. 1014-1017
Author(s):  
Yi Cheng Chang ◽  
Meng Ting Hsu ◽  
Yu Chang Hsieh
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Average Power ◽  
Wide Band ◽  
Low Noise ◽  
Input Matching ◽  
Common Gate ◽  
Cmos Lna ◽  
Noise Amplifier ◽  
Is Design

In this study, three stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. The UWB LNA is design in 0.18μm TSMC CMOS technique. The LNA input and output return loss are both less than-10dB, and achieved 10dB of average power gain, the minimum noise figure is 6.55dB, IIP3 is about-9.5dBm. It consumes 11mW from a 1.0-V supply voltage.

scholarly journals A 0.18um CMOS Low Noise Amplifier for 3-5ghz UWB Receivers

2018 ◽  
Vol 7 (3.6) ◽  
pp. 84
Author(s):  
N Malika Begum ◽  
W Yasmeen
Keyword(s):  
Power Supply ◽  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Ultra Wideband ◽  
Noise Amplifier ◽  
5 Ghz ◽  
Chebyshev Filter ◽  
Minimum Noise

This paper presents an Ultra-Wideband (UWB) 3-5 GHz Low Noise Amplifier (LNA) employing Chebyshev filter. The LNA has been designed using Cadence 0.18um CMOS technology. Proposed LNA achieves a minimum noise figure of 2.2dB, power gain of 9dB.The power consumption is 6.3mW from 1.8V power supply.  

scholarly journals Design of Low Noise Amplifier for WLAN using pHEMT

2020 ◽  
Vol 9 (2) ◽  
pp. 272
Author(s):  
G. Thirunavukkarasu ◽  
G. Murugesan
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Power Consumption ◽  
Systematic Design ◽  
Noise Performance ◽  
Design And Manufacturing ◽  
Noise Amplifier ◽  
Minimum Noise ◽  
Minimum Noise Figure

The low power consumption devices are frequently focused in design and manufacturing wireless communication system. This paper gives a systematic design of a low noise amplifier for WLAN application aimed to obtain minimum noise figure. The simulation result shows that the noise figure is in the appreciable level (1.67 dB). The maximum gain is greater than 10 dB. These are the predominant requirements of an LNA. Also it posses good stability and the LNA design uses pHEMT for its appreciable noise performance.  

A Low Noise Amplifier with 1.1dB Noise Figure and +17dBm OIP3 for GPS RF Receivers

2013 ◽  
Vol 336-338 ◽  
pp. 1490-1495
Author(s):  
Yong Xiang ◽  
Yan Bin Luo ◽  
Ren Jie Zhou ◽  
Cheng Yan Ma
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Gain Compression ◽  
Sige Hbt ◽  
Current Consumption ◽  
Sige Bicmos ◽  
Noise Amplifier ◽  
Feedback Resistor

A 1.575GHz SiGe HBT(heterojunction bipolar transistor) low-noise-amplifier(LNA) optimized for Global Positioning System(GPS) L1-band applications was presented. The designed LNA employed a common-emitter topology with inductive emitter degeneration to simultaneously achieve low noise figure and input impedance matching. A resistor-bias-feed circuit with a feedback resistor was designed for the LNA input transistor to improve the gain compression and linearity performance. The LNA was fabricated in a commercial 0.18µm SiGe BiCMOS process. The LNA achieves a noise figure of 1.1dB, a power gain of 19dB, a input 1dB compression point(P1dB) of -13dBm and a output third-order intercept point(OIP3) of +17dBm at a current consumption of 3.6mA from a 2.8V supply.

The Design and Modeling of 30 GHz Microwave Front-End

2012 ◽  
pp. 205-238
Author(s):  
Wan Yeen Ng ◽  
Xhiang Rhung Ng
Keyword(s):  
Millimeter Wave ◽  
Integrated Circuit ◽  
Noise Figure ◽  
Supply Voltage ◽  
Low Noise ◽  
Operating Frequency ◽  
Total Power ◽  
Automotive Radar ◽  
Gain Compression ◽  
Noise Amplifier

This chapter aims to discuss a millimeter wave integrated circuit (MMWIC) in frequency of 30 GHz especially switch (SPDT), medium power amplifier (MPA) and low noise amplifier (LNA). The switch is developed using a commercial 0.15 µm GaAs pHEMT technology. It achieves low loss and high isolation for millimeter wave applications. The circuit and layout drawing of SPDT switch are done by using Advanced Design System (ADS) software. The layout is verified by running the Design Rules Check (DRC) to check and clear all the errors. At the operating frequency of 30 GHz, the reported SPDT switch has 1.470 dB insertion loss and 37.455 dB of isolation. It also demonstrates 26.00 dBm of input P1dB gain compression point (P1dB) and 22.975 dBm of output P1dB. At a supply voltage of 3.0 V and 30 GHz operating frequency, this two-stage LNA achieves an associated gain of 21.628 dB, noise figure (NF) of 2.509 dB and output referred 1-dB compression point (P1dB) of -11.0 dBm, the total power consumptions for the LNA is 174 mW. At a supply voltage of 6.0 V and 30 GHz operating frequency, a 2-stage MPA achieves a linear gain (S21) of 13.236 dB, P1dB of 22.5 dBm, power gain of 11.055 dB and the PAE of 14.606%. The total power consumption for the MPA is 1.122 W. The 30 GHz LNA and PA can be applied in direct broadcast satellite (DBS), automotive radar transmitter and receiver.

Optimized Design of Low Power Complementary Metal Oxide Semiconductor Low Noise Amplifier for Zigbee Application

2021 ◽  
Vol 18 (4) ◽  
pp. 1327-1330
Author(s):  
S. Manjula ◽  
R. Karthikeyan ◽  
S. Karthick ◽  
N. Logesh ◽  
M. Logeshkumar
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Supply Voltage ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Oxide Semiconductor ◽  
Design System ◽  
Cmos Process ◽  
Design Specifications ◽  
Noise Amplifier

An optimized high gain low power low noise amplifier (LNA) is presented using 90 nm CMOS process at 2.4 GHz frequency for Zigbee applications. For achieving desired design specifications, the LNA is optimized by particle swarm optimization (PSO). The PSO is successfully implemented for optimizing noise figure (NF) when satisfying all the design specifications such as gain, power dissipation, linearity and stability. PSO algorithm is developed in MATLAB to optimize the LNA parameters. The LNA with optimized parameters is simulated using Advanced Design System (ADS) Simulator. The LNA with optimized parameters produces 21.470 dB of voltage gain, 1.031 dB of noise figure at 1.02 mW power consumption with 1.2 V supply voltage. The comparison of designed LNA with and without PSO proves that the optimization improves the LNA results while satisfying all the design constraints.

A FULLY INTEGRATED MULTIBAND CMOS 0.35 μM LNA FOR IEEE802.16 STANDARD

2013 ◽  
Vol 22 (02) ◽  
pp. 1250088 ◽  
Author(s):  
MERIAM BEN AMOR ◽  
MOURAD LOULOU ◽  
SEBASTIEN QUINTANEL ◽  
DANIEL PASQUET
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Wide Band ◽  
Low Noise ◽  
Cmos Process ◽  
Frequency Range ◽  
Fully Integrated ◽  
Input Matching ◽  
Noise Amplifier ◽  
Chebyshev Filter

In this paper we present the design of a fully integrated low noise amplifier for WiMAX standard with AMS 0.35 μm CMOS process. This LNA is designed to cover the frequency range for licensed and unlicensed bands of the WiMAX 2.3–5.9 GHz. The proposed amplifier achieves a wide band input and output matching with S11 and S22 lower than -10 dB, a flat gain of 12 dB and a noise figure around 3.5 dB for the entire band and from the upper to the higher frequencies. The presented wide band LNA employs a Chebyshev filter for input matching and an inductive shunt feedback for output matching with a bias current of 15 mA and a supply voltage of 2.5 V.

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