Combinatorial Study on In-Ga-Zn-O Semiconductor Films as Active-channel Layers for Thin-film Transistor

2006 ◽  
Vol 928 ◽  
Author(s):  
Tatsuya Iwasaki ◽  
Naho Itagaki ◽  
Tohru Den ◽  
Hideya Kumomi ◽  
Kenji Nomura ◽  
...  
Keyword(s):  
Thin Film ◽  
Room Temperature ◽  
Thin Film Transistor ◽  
Chemical Compositions ◽  
Semiconductor Films ◽  
Mixed Gas ◽  
Current Ratio ◽  
Gas Atmosphere ◽  
Wide Compositional Range ◽  
Active Channel

ABSTRACTThe device characteristics of thin-film transistors (TFTs) having amorphous In-Ga-Zn-O channel layers with various chemical compositions were studied by using combinatorial synthesis techniques. The In-Ga-Zn-O films were prepared by a radio-frequency magnetron sputtering method at room temperature in mixed-gas atmosphere of argon and oxygen. The TFT libraries enabled us to systematically survey the device characteristics of the TFTs in a wide compositional range of channel materials. It is found that the TFT characteristics are very sensitive to the chemical composition ratio of In:Ga:Zn and depend also on the oxygen partial pressure during deposition. Some devices exhibited good performance of the field-effect mobility of ∼10 cm2V−1sec−1 and on-to-off current ratio of ∼108.

The Fabrication and Characterization of Amorphous Indium Zinc Oxide (In2O3:10wt%ZnO) based Thin Film Transistors

2005 ◽  
Vol 905 ◽  
Author(s):  
Burag Yaglioglu ◽  
Hyo-Young Yeom ◽  
Roderic Beresford ◽  
David Paine
Keyword(s):  
Thin Film ◽  
Carrier Concentration ◽  
Thin Film Transistors ◽  
Room Temperature ◽  
Thin Film Transistor ◽  
Active Matrix ◽  
Si Substrates ◽  
Gas Atmosphere ◽  
Sputter Deposited ◽  
P Type

AbstractThin film transistors were fabricated using amorphous IZO (In2O3-10wt%ZnO) with low carrier concentration (∼3×1017/cm3) for the channel material and a-IZO with high carrier concentration (∼2×1020/cm3) for source-drain metallization. The performance of a-IZO channel materials processed entirely at room temperature was established using a simple gate-down thin film transistor device. The TFT test structures were fabricated on p-type Si substrates with a thermally grown SiO2 gate oxide. The channel and metallization layers were sputter deposited from a commercially available IZO target at room temperature in a gas atmosphere containing 10 vol.% and 0 vol.% oxygen, respectively. The TFT devices are depletion mode n-channel devices with a high saturation mobility (∼20cm2/Vs) and high on/off ratio (∼108) and, as such, appear to be well suited for active matrix TFT applications.

scholarly journals Influence of Active Channel Layer Thickness on SnO2 Thin-Film Transistor Performance

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 200
Author(s):  
Do Won Kim ◽  
Hyeon Joong Kim ◽  
Changmin Lee ◽  
Kyoungdu Kim ◽  
Jin-Hyuk Bae ◽  
...  
Keyword(s):  
Thin Film ◽  
Field Effect ◽  
Thin Film Transistor ◽  
Sol Gel ◽  
Precursor Concentration ◽  
Sno2 Thin Film ◽  
Field Effect Mobility ◽  
Si Substrates ◽  
Channel Layer ◽  
Active Channel

Sol-gel processed SnO2 thin-film transistors (TFTs) were fabricated on SiO2/p+ Si substrates. The SnO2 active channel layer was deposited by the sol-gel spin coating method. Precursor concentration influenced the film thickness and surface roughness. As the concentration of the precursor was increased, the deposited films were thicker and smoother. The device performance was influenced by the thickness and roughness of the SnO2 active channel layer. Decreased precursor concentration resulted in a fabricated device with lower field-effect mobility, larger subthreshold swing (SS), and increased threshold voltage (Vth), originating from the lower free carrier concentration and increase in trap sites. The fabricated SnO2 TFTs, with an optimized 0.030 M precursor, had a field-effect mobility of 9.38 cm2/Vs, an SS of 1.99, an Ion/Ioff value of ~4.0 × 107, and showed enhancement mode operation and positive Vth, equal to 9.83 V.

Effects of Drying Temperature on Surface Morphology and Electric Behavior of IGZO Thin Film Prepared by Solution Process

2015 ◽  
Vol 1731 ◽  
Author(s):  
Nobuko Fukuda ◽  
Shintaro Ogura ◽  
Koji Abe ◽  
Hirobumi Ushijima
Keyword(s):  
Thin Film ◽  
Organic Solvents ◽  
Room Temperature ◽  
Thin Film Transistor ◽  
Solution Process ◽  
Precursor Solution ◽  
Drying Process ◽  
Minor Variation ◽  
Drying Temperature ◽  
Metal Nitrates

ABSTRACTWe have achieved a drastic improvement of the performance as thin film transistor (TFT) for solution-processed IGZO thin film by controlling drying temperature of solvents containing the precursor solution. The IGZO-precursor solution was prepared by mixing of metal nitrates and two kinds of organic solvents, 2-methoxyethanol (2ME) and 2,2,2-trifluoroethanol (TFE). 2ME was used for dissolving metal nitrates. TFE was added as a solvent for reducing surface tension as small as possible, leading to improvement of the wettability of the precursor solution on the surface of the substrate. In order to discuss the relationship between morphology and drying process, the spin-coated IGZO-precursor films were dried at room temperature and 140 °C on a hotplate, respectively. Annealing of the both films was carried out at 300 °C in an electric oven for 60 min after each drying process. Drying at room temperature provides a discontinuous film, resulting in a large variation of the TFT performance. On the other hand, drying at 140 °C provides a continuous film, resulting in the higher TFT performance and a minor variation. The difference in surface morphologies would be derived from the evaporation rate of the organic solvents. The rapid evaporation at 140 °C brings about rapid pinning of the spin-coated precursor layer on the substrate. Preparation process via the drying at 140 °C gave ∼ 1 cm2 V-1 s-1 of the saturated mobility, quite small hysteresis, and 107∼ 108 of the on-off ratio.

A room temperature strategy towards enhanced performance and bias stability of oxide thin film transistor with a sandwich structure channel layer

2017 ◽  
Vol 110 (15) ◽  
pp. 153503 ◽  
Author(s):  
Yong Zeng ◽  
Honglong Ning ◽  
Zeke Zheng ◽  
Hongke Zhang ◽  
Zhiqiang Fang ◽  
...  
Keyword(s):  
Thin Film ◽  
Sandwich Structure ◽  
Room Temperature ◽  
Thin Film Transistor ◽  
Oxide Thin Film ◽  
Channel Layer ◽  
Bias Stability ◽  
Structure Channel

Formaldehyde Detection Based on P3HT/InSnO Composite Thin Film Transistor

2014 ◽  
Vol 875-877 ◽  
pp. 82-86
Author(s):  
Xian Li ◽  
Ya Dong Jiang ◽  
Hui Ling Tai ◽  
Guang Zhong Xie ◽  
Wen Chao Dan
Keyword(s):  
Thin Film ◽  
Composite Film ◽  
Thin Film Transistors ◽  
Room Temperature ◽  
Thin Film Transistor ◽  
Organic Thin Film Transistors ◽  
Composite Thin Film ◽  
Organic Thin Film ◽  
Response And Recovery

Formaldehyde, a colorless and pungent-smelling gas, had been confirmed be a huge threat to people health. The detection of formaldehyde was necessary and important at room temperature. Sprayed P3HT/InSnO composite film based on organic thin film transistors (OTFT) was fabricated to detect formaldehyde at room temperature in this paper. The results showed that P3HT/ InSnO-OTFT showed better response and recovery to HCHO compared with P3HT-OTFT at room temperature.

scholarly journals Demonstration on Ferroelectric-gate Thin Film Transistor NAND-type Array with Disturbance-free Operation

2019 ◽  
Vol 35 (2) ◽  
Author(s):  
Bui Nguyen Quoc Trinh
Keyword(s):  
Thin Film ◽  
Thin Film Transistor ◽  
Sol Gel ◽  
Gate Insulator ◽  
Current Ratio ◽  
Memory State ◽  
Small Loss ◽  
Memory Circuit ◽  
Novel Concept ◽  
Data Reading

Abstract: A novel concept of NAND memory array has been proposed by using only ferroelectric-gate thin film transistors (FGTs), whose structure is constructed from a sol-gel ITO channel and a sol-gel stacked ferroelectric between Bi3.25La0.75Ti3O12 and PbZr0.52TiO0.48O3 (BLT/PZT) gate insulator. Interestingly, ferroelectric cells with a wide memory window of 3 V and a large on/off current ratio of 6 orders, have been successfully integrated in a NAND memory circuit. To protect data writing or reading from disturbance, ferroelectric transistor cells are directly used, instead of paraelectric transistor cells as usual. As a result, we have verified disturbance-free operation for data reading and writing, with a small loss of the memory state and a low power consumption, in principle. Keywords: ITO, PZT, NAND, FeRAM, ferroelectric.

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