Improving Silicon Crystallinity by Grain Reorientation Annealing

2009 ◽  
Vol 1153 ◽  
Author(s):  
Katherine L. Saenger ◽  
Joel P. de Souza ◽  
Daniel Inns ◽  
Keith E. Fogel ◽  
Devendra K. Sadana

AbstractDemand for high efficiency, low-cost solar cells has led to strong interest in post-deposition processing techniques that can improve the crystallinity of thick (1 to 40 μm) silicon films deposited at high growth rates. Here we describe a high temperature grain reorientation annealing process that enables the conversion of polycrystalline silicon (poly-Si) into a single crystal material having the orientation of an underlying single crystal Si seed layer. Poly-Si films of thickness 0.5 to 1.0 μm were deposited by low pressure chemical vapor deposition (LPCVD) on substrates comprising a surface thermal oxide or a 100-oriented single crystal silicon-on-insulator (SOI) layer. After annealing at 1300 °C for 1 hour, poly-Si on oxide shows very significant grain growth, as expected. In contrast, the poly-Si deposited on SOI showed no grain boundaries after annealing, transforming into a single crystal material with a fairly high density of stacking faults. Possible uses and drawbacks of this approach for solar cell applications will be discussed.

1985 ◽  
Vol 48 ◽  
Author(s):  
I. Golecki ◽  
R. L. Maddox ◽  
H. L. Glass ◽  
A. L. Lin ◽  
H. M. Manasevit

ABSTRACTA new approach to achieving a large-area silicon-on-insulator technology without pre-patterning is described. (100) Si films are first grown epitaxially on (100) yttria-stabilized cubic zirconia (YSZ) substrates by the pyrolysis of SiH4. The Si side of the <Si>/<YSZ>interface is then oxidized in pyrogenic steam (at 925 °C) or dry oxygen (at 1100°C) to form the structure <Si>/amorphous SiO2/<YSZ>. The oxidation occurs by the rapid diffusion of oxidants through the 0.42 mm thick YSZ substrate; e.g., a 0.3 μm SiO2 layer is obtained in 6 h in steam. The samples are analyzed by Rutherford backscattering and channeling spectrometry, X-ray diffraction, infra-red reflectance, Auger electron spectroscopy and sheet resistance measurements. In addition to forming the preferred Si/SiO2 interface, the back-side oxidation eliminates the most defective part of the Si film.


Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.


Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1118
Author(s):  
Yuan Tian ◽  
Yi Liu ◽  
Yang Wang ◽  
Jia Xu ◽  
Xiaomei Yu

In this paper, a polyimide (PI)/Si/SiO2-based piezoresistive microcantilever biosensor was developed to achieve a trace level detection for aflatoxin B1. To take advantage of both the high piezoresistance coefficient of single-crystal silicon and the small spring constant of PI, the flexible piezoresistive microcantilever was designed using the buried oxide (BOX) layer of a silicon-on-insulator (SOI) wafer as a bottom passivation layer, the topmost single-crystal silicon layer as a piezoresistor layer, and a thin PI film as a top passivation layer. To obtain higher sensitivity and output voltage stability, four identical piezoresistors, two of which were located in the substrate and two integrated in the microcantilevers, were composed of a quarter-bridge configuration wheatstone bridge. The fabricated PI/Si/SiO2 microcantilever showed good mechanical properties with a spring constant of 21.31 nN/μm and a deflection sensitivity of 3.54 × 10−7 nm−1. The microcantilever biosensor also showed a stable voltage output in the Phosphate Buffered Saline (PBS) buffer with a fluctuation less than 1 μV @ 3 V. By functionalizing anti-aflatoxin B1 on the sensing piezoresistive microcantilever with a biotin avidin system (BAS), a linear aflatoxin B1 detection concentration resulting from 1 ng/mL to 100 ng/mL was obtained, and the toxic molecule detection also showed good specificity. The experimental results indicate that the PI/Si/SiO2 flexible piezoresistive microcantilever biosensor has excellent abilities in trace-level and specific detections of aflatoxin B1 and other biomolecules.


2020 ◽  
pp. 100107
Author(s):  
L.G. Michaud ◽  
E. Azrak ◽  
C. Castan ◽  
F. Fournel ◽  
F. Rieutord ◽  
...  

Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi ◽  
K. E. Goodson

Simulations of the temperature field in Silicon-on-Insulator (SOI) and strained-Si transistors can benefit from experimental data and modeling of the thin silicon layer thermal conductivity at high temperatures. This work presents the first experimental data for 20 and 100 nm thick single crystal silicon layers at high temperatures and develops algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering for pure and doped silicon layers. The model applies to temperatures range 300–1000 K for silicon layer thicknesses from 10 nm to 1 μm (and even bulk) and agrees well with the experimental data. In addition, the model has an excellent agreement with the predictions of thin film thermal conductivity based on thermal conductivity integral and Boltzmann transport equation, although it is significantly more robust and convenient for integration into device simulators. The experimental data and predictions are required for accurate thermal simulation of the semiconductor devices, nanostructures and in particular the SOI and strained-Si transistors.


1987 ◽  
Vol 65 (8) ◽  
pp. 892-896 ◽  
Author(s):  
R. E. Thomas ◽  
C. E. Norman ◽  
S. Varma ◽  
G. Schwartz ◽  
E. M. Absi

A low-cost, high-yield technology for producing single-crystal silicon solar cells at high volumes, and suitable for export to developing countries, is described. The process begins with 100 mm diameter as-sawn single-crystal p-type wafers with one primary flat. Processing steps include etching and surface texturization, gaseous-source diffusion, plasma etching, and contacting via screen printing. The necessary adaptations of such standard processes as diffusion and plasma etching to solar-cell production are detailed. New process developments include a high-throughput surface-texturization technique, and automatic printing and firing of cell contacts.The technology, coupled with automated equipment developed specifically for the purpose, results in solar cells with an average efficiency greater than 12%, a yield exceeding 95%, a tight statistical spread on parameters, and a wide tolerance to starting substrates (including the first 100 mm diameter wafers made in Canada). It is shown that with minor modifications, the present single shift 500 kWp (kilowatt peak) per year capacity technology can be readily expanded to 1 MWp per year, adapted to square and polycrystalline substrates, and efficiencies increased above 13%.


Sign in / Sign up

Export Citation Format

Share Document