300° C Processing of Si Using Remote Plasma Techniques for In Situ Cleaning, Epitaxy, and Oxide/Nitride/Oxide Depositions

1989 ◽  
Vol 146 ◽  
Author(s):  
G.G. Fountain ◽  
S.V. Hattangady ◽  
R.A. Rudder ◽  
J.B. Posthill ◽  
R.J. Markunas
Keyword(s):  
Past History ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Interface State ◽  
State Density ◽  
Hydrogen Treatment ◽  
Remote Plasma ◽  
Nitride Oxide ◽  
By Products

ABSTRACTLow temperature Si processing techniques have been developed using remote plasma enhanced chemical vapor techniques. The 300° C in situ processes include indirectly excited hydrogen treatments for obtaining reconstructed Si(100) surfaces, Si/Si(100) homoepitaxy, and deposition of poly-Si/oxide/nitride/oxide/Si(100) structures with no capacitance-voltage hysteresis and low interface state density (4×1010cm−2eV−1). While all these processes have been accomplished with the same tool, the success of the in situ hydrogen treatment and the homoepitaxy are sensitive to the past history of the reactor. In particular, they are sensitive to by-products formed during the oxide deposition process. To eliminate these by-products, plasma conditioning of the chamber walls prior to introduction of the silicon wafer from the load lock has been necessary to obtain reproducible results.

Properties of Thin SiO2 Films with In-Situ Deposition of Poly Si Electrodes

1989 ◽  
Vol 146 ◽  
Author(s):  
Paihung Pan ◽  
Ahmad Kermani ◽  
Wayne Berry ◽  
Jimmy Liao
Keyword(s):  
Electrical Properties ◽  
Breakdown Strength ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
In Situ Deposition ◽  
Different Temperatures ◽  
Flatband Voltage ◽  
Si Films

ABSTRACTElectrical properties of thin (12 nm) SiO2 films with and without in-situ deposited poly Si electrodes have been studied. Thin SiO2 films were grown by the rapid thermal oxidation (RTO) process and the poly Si films were deposited by the rapid thermal chemical vapor deposition (RTCVD) technique at 675°C and 800°C. Good electrical properties were observed for SiO2 films with thin in-situ poly Si deposition; the flatband voltage was ∼ -0.86 V, the interface state density was < 2 × 1010/cm2/eV, and breakdown strength was > 10 MV/cm. The properties of RTCVD poly Si were also studied. The grain size was 10-60 rim before anneal and was 50-120 rim after anneal. Voids were found in thin (< 70 nm) RTCVD poly Si films. No difference in either SiO2 properties or poly Si properties was observed for poly Si films deposited at different temperatures.

Fabrication of High Quality MOS Devices for Application in Hazardous Environments Based on RTP Gate Dielectrics with In Situ RTCVD of Polysilicon Gates

1993 ◽  
Vol 300 ◽  
Author(s):  
B. Fröschle ◽  
H.P. Bruemmer ◽  
W. Lang ◽  
K. Neumeier ◽  
P. Ramm
Keyword(s):  
Threshold Voltage ◽  
Gate Dielectrics ◽  
Chemical Vapor ◽  
Process Variations ◽  
Interface State ◽  
State Density ◽  
Breakdown Field ◽  
Polysilicon Gate ◽  
Radiation Induced

ABSTRACTProcess modules for MOS gate fabrication were developed which can be completed subsequently in one RTP reactor: atmospheric process sequences for gate oxides and oxynitrides as well as low pressure chemical vapor deposition of polysilicon (RTCVD). Prior to the Rapid Thermal Oxidation (RTO), the wafers were treated with a Rapid Thermal Cleaning process (RTC) in H2/Ar ambient. After the desoxidation step the RTO was done in O2/H2/Ar followed by an anneal (RTA) for the gate oxide or a nitridation in NH3 (RTN) and reoxidation for the oxynitrides, respectively. The polysilicon gate electrode was fabricated either by RTCVD in situ or in a conventional furnace reactor. The two-step RTCVD process resulted in a very good thickness uniformity for the polysilicon layers of 3% (3mm from the edge). The influence of the process variations on breakdown field, fixed oxide charge, interface state density, flatband voltage, and threshold voltage of the different types of gate dielectrics was investigated. The charges and voltages were determined by LF-HF CV measurements. In order to characterize the radiation tolerance of electronic devices, radiation induced flatband and threshold voltage shifts as well as the build up of interface charges were determined. The irradiation was performed at a Co - 60 gamma source. Breakdown fields in the range of 19 MV/cm, interface state densities of less than 109 eV−1cm−2, and radiation induced threshold voltage shifts below 0.1 V after 1.5 Mrad(Si) were obtained.

Fabrication of High Quality Mos Devices for Application in Hazardous Environments Based on Rtp Gate Dielectrics With in Situ Rtcvd of Polysilicon Gates

1993 ◽  
Vol 303 ◽  
Author(s):  
B. Fröschle ◽  
H.P. Bruemmer ◽  
W. Lang ◽  
K. Neumeier ◽  
P. Ramm
Keyword(s):  
Threshold Voltage ◽  
Gate Dielectrics ◽  
Chemical Vapor ◽  
Process Variations ◽  
Interface State ◽  
State Density ◽  
Breakdown Field ◽  
Polysilicon Gate ◽  
Radiation Induced

ABSTRACTProcess modules for MOS gate fabrication were developed which can be completed subsequently in one RTP reactor: atmospheric process sequences for gate oxides and oxynitrides as well as low pressure chemical vapor deposition of polysilicon (RTCVD). Prior to the Rapid Thermal Oxidation (RTO), the wafers were treated with a Rapid Thermal Cleaning process (RTC) in H2/Ar ambient. After the desoxidation step the RTO was done in O2/H2/Ar followed by an anneal (RTA) for the gate oxide or a nitridation in NH3 (RTN) and reoxidation for the oxynitrides, respectively. The polysilicon gate electrode was fabricated either by RTCVD in situ or in a conventional furnace reactor. The two-step RTCVD process resulted in a very good thickness uniformity for the polysilicon layers of 3% (3mm from the edge). The influence of the process variations on breakdown field, fixed oxide charge, interface state density, flatband voltage, and threshold voltage of the different types of gate dielectrics was investigated. The charges and voltages were determined by LF-HF CV measurements. In order to characterize the radiation tolerance of electronic devices, radiation induced flatband and threshold voltage shifts as well as the build up of interface charges were determined. The irradiation was performed at a Co - 60 gamma source. Breakdown fields in the range of 19 MV/cm, interface state densities of less than 109 eV−2cm−2, and radiation induced threshold voltage shifts below 0.1 V after 1.5 Mrad(Si) were obtained.

Identification of Charging Effects in Plasma-Enhanced TEOS Deposition with Non-Contact Test Techniques

1998 ◽  
Author(s):  
Tomasz Brozek ◽  
James Heddleson
Keyword(s):  
Vapor Deposition ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Wafer Surface ◽  
Oxide Charge ◽  
Contact Test ◽  
Deposition Power ◽  
Oxide Deposition

Abstract Use of non-contact test techniques to characterize degradation of the Si-SiO2 system on the wafer surface exposed to a plasma environment have proven themselves to be sensitive and useful in investigation of plasma charging level and uniformity. The current paper describes application of the surface charge analyzer and surface photo-voltage tool to explore process-induced charging occurring during plasma enhanced chemical vapor deposition (PECVD) of TEOS oxide. The oxide charge, the interface state density, and dopant deactivation are studied on blanket oxidized wafers with respect to the effect of oxide deposition, power lift step, and subsequent annealing.

The Properties Of a-Si:H/c-Si Heterostructures Prepared By 55 kHz Pecvd For Solar Cell Application

1997 ◽  
Vol 485 ◽  
Author(s):  
B. G Budaguan ◽  
A. A. Aivazov ◽  
A. A. Sherchenkov ◽  
A. V Blrjukov ◽  
V. D. Chernomordic ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Low Frequency ◽  
Reverse Current ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Solar Cell Application ◽  
Current Voltage ◽  
Frequency Plasma ◽  
Device Applications

AbstractIn this work a-Si:H/c-Si heterostructures with good electronic properties of a-Si:H were prepared by 55 kHz Plasma Enhanced Chemical Vapor Deposition (PECVD). Currentvoltage and capacitance-voltage characteristics of a-Si:H/c-Si heterostructures were measuredto investigate the influence of low frequency plasma on the growing film and amorphous silicon/crystalline silicon boundary. It was established that the interface state density is low enough for device applications (<2.1010 cm−2). The current voltage measurements suggest that, when forward biased, space-charge-limited current determines the transport mechanism in a- Si:H/c-Si heterostructures, while reverse current is ascribed to the generation current in a-Si:H and c-Si depletion layers.

Low Interface State Density Oxide-GaAs Structures Fabricated by In-Situ Molecular Beam Epitaxy

1996 ◽  
Vol 421 ◽  
Author(s):  
M. Passlack ◽  
M. Hong
Keyword(s):  
Molecular Beam Epitaxy ◽  
Molecular Beam ◽  
Molecular Beams ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
In Situ Deposition ◽  
Interface Recombination Velocity ◽  
Recombination Velocity

AbstractWe have extended the spectrum of molecular-beam epitaxy (MBE) related techniques by introducing in-situ deposition of oxides. The oxide films have been deposited on clean, atomically ordered (100) GaAs wafer surfaces using molecular beams of gallium-, magnesium-, silicon-, or aluminum oxide. Among the fabricated oxide-GaAs heterostructures, Ga2O3-GaAs interfaces exhibit unique electronic properties including an interface state density Dit in the low 1010 cm−2eV−1 range and an interface recombination velocity S of 4000 cm/s. The formation of inversion layers in both n- and p-type GaAs has been clearly established. Further, thermodynamic and photochemical stability of excellent electronic interface properties of Ga2O3-GaAs structures has been demonstrated.

scholarly journals Carbon-Involved Near-Surface Evolution of Cobalt Catalyst during Reaction: An in-situ Study

2020 ◽  
Author(s):  
Feng Yang ◽  
Haofei Zhao ◽  
Wu Wang ◽  
Qidong Liu ◽  
Xu Liu ◽  
...  
Keyword(s):  
Chemical Vapor ◽  
Carbon Diffusion ◽  
Deposition Process ◽  
Catalytic Performance ◽  
Surface Evolution ◽  
Near Surface ◽  
Co Catalysts ◽  
Transmission Electron ◽  
Walled Carbon Nanotubes

Abstract When carbon-containing species are involved in reactions catalyzed by transition metals at high temperature, the diffusion of carbon on/in catalysts dramatically influence the catalytic performance. Acquiring information on the carbon-diffusion-involved evolution of catalysts at atomic level is crucial for understanding the reaction mechanism yet also challenging. For the chemical vapor deposition process of single-walled carbon nanotubes (SWCNTs), we developed methodologies to record in-situ the near-surface structural and chemical evolution of Co catalysts with carbon permeation using an aberration-corrected environmental transmission electron microscope and the synchrotron X-ray absorption spectroscopy. The nucleation and growth of SWCNTs were linked with the partial carbonization of catalysts and the alternating dissolvement-precipitation of carbon in catalysts. The dynamics of carbon atoms in catalysts brings deeper insight into the growth mechanism of SWCNTs and also sheds light on inferring mechanisms of more reactions. The methodologies developed here will find broad applications in studying catalytic and other processes.

Investigation of the off-current in amorphous silicon thin film transistors for SiO2 and SiNx. gate insulators

1996 ◽  
Vol 424 ◽  
Author(s):  
Jeong Hyun Kim ◽  
Woong Sik Choi ◽  
Chan Hee Hong ◽  
Hoe Sup Soh
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Gate Insulator ◽  
Defect States ◽  
Silicon Thin Film ◽  
Pressure Chemical

AbstractThe off current behavior of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with an atmospheric pressure chemical vapor deposition (APCVD) silicon dioxide (SiO2) gate insulator were investigated at negative gate voltages. The a-Si:H TFT with SiO2 gate insulator has small off currents and large activation energy (Ea) of the off current compared to the a-Si:H TFT with SiNx gate insulator. The holes induced in the channel by negative gate voltage seem to be trapped in the defect states near the a-Si:H/SiO2 interface. The interface state density in the lower half of the band gap of a-Si:H/SiO2 appears to be much higher than that for a-Si:H/SiNx.

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