A Tem Study of Defect Structure in GaAs Film on Si Substrate

AbstractFor the GaAs buffer layer deposited on Si substrate at 80°C and annealed at 300°C for 10 min, the size of most GaAs islands was observed as ∼ 10 nm but large islands (∼ 40 nm) were also seen. According to the calculation of spacing of moire fringes, large GaAs islands are considered to be rotated about 4 ° with respect to the Si substrate normal. However, for the main GaAs film overgrown on the GaAs buffer layer at 580 °C, moire fringes with the spacing of 5 nm (GaAs film without rotation) completely covered the surface of Si substrate. Misfit dislocations and stacking faults were already formed at the growth stage of buffer layer. Stacking faults and misfit dislocations consisting of Lomer and 60 ° dislocations were observed in GaAs films grown at 580 °C. However, after rapid thermal annealing at 900 °C for 10 sec, only Lomer dislocations with 1/2[110] and 1/2[-110] Burgers vectors were observed.

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Beam Induced Lateral Epitaxy of GaAs on a GaAs/Si Template

MRS Proceedings ◽

10.1557/proc-829-b9.30 ◽

2004 ◽

Vol 829 ◽

Author(s):

Shigeya Naritsuka ◽

Koji Saitoh ◽

Toshiyuki Kondo ◽

Takahiro Maruyama

Keyword(s):

Buffer Layer ◽

Stacking Faults ◽

Heteroepitaxial Growth ◽

Si Substrate ◽

Growth Region ◽

Gaas Buffer Layer ◽

Device Applications ◽

Lateral Epitaxy

ABSTRACTBeam induced lateral epitaxy (BILE) on truncated ridges was applied to the heteroepitaxial growth of GaAs on a Si substrate. A GaAs buffer layer was formed on the Si substrate, and then this GaAs/Si template was used as a substrate for the BILE process. As a result, overgrown regions of GaAs of widths as large as 6.5 μm were grown laterally from the sides of the truncated ridges. The growth regions had a flat, smooth top surface consisting of a (111) facet. Although stacking faults from the GaAs/Si template remained in the growth region, which are unfavorable for device applications, the lateral grown region has no dislocations. Thus, the BILE method is useful for reducing dislocations in heteroepitaxy.

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The Structure of GaAs/Si(211) Heteroepitaxial Layers

MRS Proceedings ◽

10.1557/proc-91-91 ◽

1987 ◽

Vol 91 ◽

Cited By ~ 10

Author(s):

Zuzanna Liliental-Weber ◽

E.R. Weber ◽

J. Washburn ◽

T.Y. Liu ◽

H. Kroemer

Keyword(s):

Buffer Layer ◽

Surface Preparation ◽

Gaas Layer ◽

Misfit Dislocations ◽

Strained Layer ◽

Si Substrates ◽

Density Of Dislocations ◽

Gaas Buffer Layer ◽

Graded Layers ◽

Strained Layer Superlattices

ABSTRACTGallium arsenide films grown on (211)Si by molecular-beam epitaxy have been investigated using transmission electron microscopy. The main defects observed in the alloy were of misfit dislocations, stacking faults, and microtwin lamellas. Silicon surface preparation was found to play an important role on the density of defects formed at the Si/GaAs interface.Two different types of strained-layer superlattices, InGaAs/InGaP and InGaAs/GaAs, were applied either directly to the Si substrate, to a graded layer (GaP-InGaP), or to a GaAs buffer layer to stop the defect propagation into the GaAs films. Applying InGaAs/GaAs instead of InGaAs/InGaP was found to be more effective in blocking defect propagation. In all cases of strained-layer superlattices investigated, dislocation propagation was stopped primarily at the top interface between the superlattice package and GaAs. Graded layers and unstrained AlGaAs/GaAs superlattices did not significantly block dislocations propagating from the interface with Si. Growing of a 50 nm GaAs buffer layer at 505°C followed by 10 strained-layer superlattices of InGaAs/GaAs (5 nm each) resulted in the lowest dislocation density in the GaAs layer (∼;5×l07/cm2) among the structures investigated. This value is comparable to the recently reported density of dislocations in the GaAs layers grown on (100)Si substrates [8]. Applying three sets of the same strained layersdecreased the density of dislocations an additional ∼2/3 times.

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Improved MOCVD Growth of GaAs on Si

MRS Proceedings ◽

10.1557/proc-91-125 ◽

1987 ◽

Vol 91 ◽

Cited By ~ 2

Author(s):

R.M. Lum ◽

J.K. Klingert ◽

B.A. Davidson ◽

M.G. Lamont

Keyword(s):

Buffer Layer ◽

Rutherford Backscattering Spectrometry ◽

Growth Parameters ◽

Buffer Layers ◽

Double Crystal ◽

Gaas On Si ◽

Mocvd Growth ◽

Gaas Films ◽

Gaas Buffer Layer ◽

Direct Growth

ABSTRACTIn the direct growth of GaAs on Si by MOCVD the overall quality of the heteroepitaxial film is controlled to a large extent by the growth parameters of the initial GaAs buffer layer. We have investigated the structural properties of this layer using Rutherford Backscattering Spectrometry (RBS) and X-ray double crystal diffractometry. The crystallinity of the buffer layer was observed to improve with increasing layer thickness in the range 10–100nm, and then to rapidly degrade for thicker layers. High temperature (750°C) annealing of the buffer layers resulted in considerable reordering of all but the thicker (>200 nm) layers. Alteration of the usual GaAs/Si growth sequence to include an in-situ anneal of the buffer layer after growth interruption yielded GaAs films with improved structural, optical and electrical properties.

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Structural Characterization of GaP/GaAs/GaP Heterostructure by TEM

MRS Proceedings ◽

10.1557/proc-280-449 ◽

1992 ◽

Vol 280 ◽

Author(s):

G. Aragón ◽

S. I. Molina ◽

R. García

Keyword(s):

Buffer Layer ◽

Structural Characterization ◽

Defect Structure ◽

Gaas Substrate ◽

Density Difference ◽

Interface Plane ◽

Cross Sectional ◽

Fringe Contrast ◽

Gaas Buffer Layer

ABSTRACTThe defect structure in a GaP/GaAs/GaP heterostructure deposited on a (001) GaAs substrate with a GaAs buffer layer has been characterized by cross sectional TEM. The buffer layer presents dislocations and (α-δ)-fringe contrast parallel to (001) interface plane. HREM study reveals uniformly distributed amorphous capsules in the first GaP/GaAs buffer layer interface. The dominant defects are microtwins which are propagated into the overall heterostructure. Microtwin density is different in the GaP and GaAs layers.The different stress signs may explain the density difference.

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Material Properties of GaAs-on-Si and Fabrication of Digital Integrated Circuits

MRS Proceedings ◽

10.1557/proc-116-205 ◽

1988 ◽

Vol 116 ◽

Cited By ~ 3

Author(s):

N. Clhand ◽

F. Ren ◽

S. N. G. Chu ◽

A. M. Sergent ◽

T. Boone ◽

...

Keyword(s):

Integrated Circuits ◽

Buffer Layer ◽

Cross Sections ◽

Power Dissipation ◽

Propagation Delay ◽

Si Substrate ◽

Digital Integrated Circuits ◽

Lower Growth ◽

Gaas On Si ◽

Gaas Buffer Layer

AbstractWe have found that the surface morphology of GaAs grown on Si by MBE is smoother at lower growth temperatures (<500° C), but that the crystalline properties improve at higher growth temperatures (575-600°C). After thermal annealing at 850°C for 15 rai the TEM plan-views indicate that the dislocation density on the surface is reduced by a factor of 4 only. However, the TEM cross-sections indicate a much larger reduction of dislocations in highly dislocated regions near the GaAs/Si interface. Dislocations which are loops or tangles tend to shrink and clean up after annealing leaving a larger volume of GaAs free from, or with fewer, dislocations. The density of electron deep levels reduces with increasing thickness. Electron traps M1, M3 and M4 are not seen when a high purity As is used. For high device performance, the GaAs buffer layer thickness should be at least 2 µm. Although the wafer warpage increases from 7 µm to 52 µm as the GaAs thickness increases from 1.2 µm to 4.2 µm on 7.5 cm wafers, the wafers are as fiat as the original Si wafers under vacuum clamping. Wafer warpage reduced significantly when GaAs was grown selectively through a Si shadow mask. For 1 µm gate MESFET's, σvT was 65 mV on a 3.5 × 3 cm2 wafer area with gmax = 153 mS/ram. A minimum propagation delay of 52 ps/stage at a power dissipation of 1.3 mW/gate was measured for the 19 stage DCFL ring oscillators with 40= yield. Conductivity of the Si substrate and GaAs buffer layer posed no problem in channel isolation. The divide-by-two circuits performed the frequency dividing operation up to 1.8 GHz. The study shows that GaAs-on-Si has a great potential for digital IC's.

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The Formation and Cathodoluminescence Activity of Buffer Layer Edge Dislocations in In0.12Ga0.88As/GaAs Heterostructures

MRS Proceedings ◽

10.1557/proc-104-633 ◽

1987 ◽

Vol 104 ◽

Cited By ~ 2

Author(s):

E. A. Fitzgerald ◽

P. D. Kirchner ◽

G. D. Petit ◽

J. M. Woodall ◽

D. G. Ast

Keyword(s):

Electron Microscopy ◽

Transmission Electron Microscopy ◽

Buffer Layer ◽

Defect Structure ◽

Radiative Recombination ◽

Tem Analysis ◽

Cross Sectional ◽

Transmission Electron ◽

Gaas Buffer Layer ◽

Edge Dislocations

ABSTRACTThe defect structure of lattice-mismatched one micron In0.12 Ga0.88As epilayers on (001) GaAs was studied with scanning cathodoluminescence (CL) and transmission electron microscopy (TEM). CL examination of the GaAs buffer layer revealed the formation of a segmented network of defects below the interface. Cross-sectional TEM analysis shows that these defects are dislocation half-loops extending from the interface, and the vast majority of these loops lie on the GaAs side of the interface. The dislocations in the GaAs buffer layer were determined to be edge dislocations. Thus, CL images show that edge dislocations in this system are centers for non-radiative recombination. We propose that two 60° dislocations with opposite screw and interface tilt components can glide into the buffer layer to form edge dislocations. Potential energy plots for 60° dislocations near the interface and interacting with interface dislocations supports this model.

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Crystal Quality and Surface Morphology Improvement of Movpe-Grown GaAs-on-Si Using Tertiarybutylarsine

MRS Proceedings ◽

10.1557/proc-281-345 ◽

1992 ◽

Vol 281 ◽

Author(s):

S. MIYAGAKI ◽

S. Ohkubo ◽

K. Takai ◽

N. Takagi ◽

M. Kimura ◽

...

Keyword(s):

Surface Morphology ◽

Buffer Layer ◽

Vapor Phase ◽

Metalorganic Vapor Phase Epitaxy ◽

Layer Growth ◽

Vapor Phase Epitaxy ◽

Crystal Quality ◽

Si Substrate ◽

Gaas Films

ABSTRACTWe developed GaAs heteroepitaxy on a Si substrate by metalorganic vapor phase epitaxy (MOVPE) using tertiarybutylarsine (TBAs). In buffer layer growth at 450°C, the surface morphology and crystal quality of TBAs-grown films were slightly inferior to those of AsH3-grown films. At buffer layer growth below 400°C, the quality of TBAs-grown films improved. The GaAs films we grew using TBAs had a better quality than those grown using AsH2.

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Rapid Thermal Annealing of GaAs Films on (001) Si Substrate Grown by Solid Phase Epitaxy Technique

MRS Proceedings ◽

10.1557/proc-202-473 ◽

1990 ◽

Vol 202 ◽

Author(s):

W.K. Choo ◽

K.I. Cho ◽

J.Y. Lee ◽

S.C. Park ◽

O.J. Kwon

Keyword(s):

Solid Phase ◽

Substantial Improvement ◽

Misfit Dislocations ◽

Solid Phase Epitaxy ◽

Si Substrate ◽

Rapid Thermal Anneal ◽

Transmission Electron ◽

Dislocation Densities ◽

Distributed Array ◽

Gaas Films

ABSTRACTGaAs layers grown by solid phase epitaxy on (001) Si substrate were subjected to post-growth rapid thermal anneal (RTA) at 700, 800, and 900°C for 10s in a N2 atmosphere. Rutherford backscattering/channeling showed a substantial improvement in crystalline quality of GaAs epilayer after RTA at 800°C. After RTA at 900°C for 10s, stacking faults (and/or microtwins) were eliminated entirely, and the dislocation densities in both the interface region and the film interior were reduced. High-resolution transmission electron micrographs showed a significant change in misfit dislocation structure at the interface after RTA; namely, the 90° pure edge and 60° misfit dislocations were transformed to an evenly distributed array of 90° dislocations at the interface.

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