Amorphous Phase Formation of Titanium Silicide on The 4° off-Axis and on-Axis Si(100) Substrates

1996 ◽  
Vol 427 ◽  
Author(s):  
Hyeongtag Jeon ◽  
Sukjae Lee ◽  
Hwackjoo Lee ◽  
Hyun Ruh

AbstractTwo different Si(100) substrates, the 4°off-axis and the on-axis Si(100), were prepared. Ti thin films were deposited in an e-beam evaporation system and the amorphous layers of Ti-silicide were formed at different annealing temperatures. The Si(100) substrates before Ti film deposition were examined with AFM to verify the atomic scale roughness of the initial Si substrates. The amorphous layer was observed by HRTEM and TEM. And the chemical analysis and phase identification were examined by AES and XRD. The Si(100) substrate after HF clean shows the atomic scale microroughness such as atomic steps and pits on the Si surface. The on-axis Si(100) substrate exhibits much rougher surface morphologies than those of the off-axis Si(100). These differences of atomic scale roughnesses of Si substrates result in the difference of the thicknesses of amorphous Ti-silicide layers. The amorphous layer thicknesses on the on-axis exhibit thicker than those of the off-axis Si(100) and these differences inamorphous layer thicknesses became decreased as annealing temperatures increased. These indicate that the role of the atomic scale roughness on the amorphous layer thickness is much significant at low temperatures. In this study, the correlation between the atomic scale roughness and the amorphous layer thickness is discussed in terms of the atomic steps and pits based on the observation with using analysis tools such as AFM, TEM and HRTEM.

2002 ◽  
Vol 745 ◽  
Author(s):  
G. Vellianitis ◽  
G. Apostolopoulos ◽  
A. Dimoulas ◽  
K. Argyropoulos ◽  
B. Mereu ◽  
...  

ABSTRACTY2O3 thin films were grown directly on Si (001) by MBE and annealed in-situ under UHV at various annealing temperatures. The samples were investigated in-situ by RHEED and ex-situ by HRTEM. A 7 to 15 Å thick non-uniform interfacial amorphous layer is observed in the as-grown sample. After annealing at 490°C under UHV for 30 minutes the amorphous layer is reduced and a sharp Y2O3/Si interface is obtained. At higher annealing temperatures, YSi2 islands start to form at the Y2O3/Si interface. I-V measurements performed on generic MIS structures show that the annealed samples exhibit higher leakage current density than the as-grown sample, due to reduction of the wide band gap interfacial layer. Leakage current densities in annealed samples remain below 1A/cm2, which is acceptable for future high-κ transistor fabrication.


2001 ◽  
Vol 685 ◽  
Author(s):  
Won-Jae Lee ◽  
Chang-Ho Shin ◽  
In-Kyu You ◽  
Il-Suk Yang ◽  
Sang-Ouk Ryu ◽  
...  

AbstractThe SrTa2O6 (STO) thin films were prepared by plasma enhanced atomic layer deposition (PEALD) with alternating supply of reactant sources, Sr[Ta(C2H5O)5(C4H10NO)]2 {Strontium bis-[tantalum penta-ethoxide dimethyllaminoethoxide]; Sr(Ta(OEt)5▪dmae)2} and O2plasma. It was observed that the uniform and conformal STO thin films were successfully deposited using PEALD and the film thickness per cycle was saturated at about 0.8 nm at 300°C. Electrical properties of SrTa2O6 (STO) thin films prepared on Pt/SiO2/Si substrates with annealing temperatures have been investigated. While the grain size and dielectric constant of STO films increased with increasing annealing temperature, the leakage current characteristics of STO films slightly deteriorated. The leakage current density of a 40nm-STO film was about 5×10−8A/cm2 at 3V.


2004 ◽  
Vol 811 ◽  
Author(s):  
Koji Kita ◽  
Masashi Sasagawa ◽  
Masahiro Toyama ◽  
Kentaro Kyuno ◽  
Akira Toriumi

ABSTRACTHfO2 films were deposited by reactive sputtering on Ge and Si substrates simultaneously, and we found not only the interface layer but the HfO2 film was thinner on Ge substrate compared with that on Si substrate. A metallic Hf layer has a crucial role for the thickness differences of both interface layer and HfO2 film, since those thickness differences were observed only when an ultrathin metallic Hf layer was predeposited before HfO2 film deposition. The role of metallic Hf is understandable by assuming a formation of volatile Hf-Ge-O ternary compounds at the early stage of film growth. These results show an advantage of HfO2/Ge over HfO2/Si systems from the viewpoint of further scaling of electrical equivalent thickness of the gate oxide films.


2020 ◽  
Vol 699 ◽  
pp. 137893
Author(s):  
Kee Hong Lim ◽  
Minh Tan Man ◽  
Anh Thi Le ◽  
Jin Chul Choi ◽  
Hong Seok Lee

1998 ◽  
Vol 4 (S2) ◽  
pp. 610-611
Author(s):  
Julia W. P. Hsu ◽  
M. H. Gray ◽  
Q. Xu

Due to the submicron size of crystallographic defects, characterization of dislocations has been done. mostly by electron microscopy techniques. Transmission electron microscopy has generated invaluable structural information at the atomic scale. However, the influence of these electrically active defects on carrier transport can only be learned from lower resolution (∼ 1 μm) techniques such as electron beam induced current (EBIC) and photocurrent measurements. Near-field scanning optical microscopy (NSOM) is a novel optical technique that circumvents the diffraction limit. In this talk, we will present the application of NSOM to perform near-field photocurrent (NPC) measurements on strain-relaxed GeSi films on Si substrates to study the electrical activity of individual threading dislocations. Photoexcited carriers are generated locally by NSOM light and are collected by the builtin p-n junctions in the sample resulting in an external photocurrent. As the tip moves across the sample, topographic and NPC images were acquired simultaneously.


1989 ◽  
Vol 162 ◽  
Author(s):  
G. A. J. Amaratunga ◽  
W. I. Milne ◽  
A. Putnis ◽  
K. K. Chan ◽  
K. J. Clay ◽  
...  

ABSTRACTThin C films deposited from a CH4/Ar plasma on Si substrates kept at 20C are shown to be semiconducting. The semiconducting properties are associated with the poly-crystalline diamond grains present within the films. Diode type I-V characteristics observed from AVC/Si verticle structures are explained by the action of a C-Si heterojunction. A band gap of 2eV, a resistivity of 106Ω.cm and an electrical breakdown strength of 5.106 V/cm are estimated for the C.


2006 ◽  
Vol 984 ◽  
Author(s):  
A. Stesmans ◽  
K. Clémer ◽  
P. Somers ◽  
V. V. Afanas'ev

AbstractElectron spin resonance (ESR) spectroscopy has become indispensable when it comes to the characterization on atomic-scale of structural, and correlated, electrical properties of actual semiconductor/insulator heterostructures. Through probing of paramagnetic point defects such as the Pb-type defects, E', and EX as a function of VUV irradiation and post deposition heat treatment, basic information as to the nature, quality, and thermal stability of the interface and interfacial regions can be established. This is illustrated by some specific examples of ESR analysis on contemporary Si/insulator structures promising for future developments in integrated circuits. First the impact of strain on the Si/SiO2 entity will be discussed. Through ESR analysis of thermally oxidized (111)Si substrates mechanically stressed in situ during oxidation, and tensile strained (100)sSi/SiO2 structures, it will be pointed out that in-plane tensile stress in Si can significantly improve the interface quality. Next, ESR results for stacks of (100)Si/SiOx/HfO2 and (100)Si/LaAlO3 are presented, revealing the potential to attain a high quality Si/SiO2 interface for the former and an abrupt, thermally stable interface for the latter.


1982 ◽  
pp. 147-172 ◽  
Author(s):  
A. Otto ◽  
I. Pockrand ◽  
J. Billmann ◽  
C. Pettenkofer
Keyword(s):  

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