Ultra Shallow Junction Formation by RTA at High Temperature for Short Heating Cycle Time

1998 ◽  
Vol 532 ◽  
Author(s):  
S. Saito ◽  
S. Shishiguchi ◽  
A. Mineji ◽  
T. Matsuda

ABSTRACTIn accordance with decrease of device size, ultra shallow junctions are required for realizing superior device performance. Enhanced diffusion caused by implantation is a crucial factor to realize ultra shallow junctions. Not only implant but also RTA conditions are key factors to suppress enhanced diffusion. In this paper, process conditions to minimize enhanced diffusion are discussed. Implant ion species, energy, dose and beam current parameters are investigated for implantation and temperature, time and ramping rate parameters are investigated for RTA. Important result is that optimization of not only implant but also RTA conditions should be carried out in order to fabricate ultra shallow junctions.

2000 ◽  
Vol 610 ◽  
Author(s):  
Ant Ural ◽  
Serene Koh ◽  
P. B. Griffin ◽  
J. D. Plummer

AbstractUnderstanding the coupling between native point defects and dopants at high concentrations in silicon will be key to ultra shallow junction formation in silicon technology. Other effects, such as transient enhanced diffusion (TED) will become less important. In this paper, we first describe how thermodynamic properties of the two native point defects in silicon, namely vacancies and self-interstitials, have been obtained by studying self-diffusion in isotopically enriched structures. We then discuss what this tells us about dopant diffusion. In particular, we show that the diffusion of high concentration shallow dopant profiles is determined by the competition between the flux of mobile dopants and those of the native point defects. These fluxes are proportional to the interstitial or vacancy components of dopant and self-diffusion, respectively. This is why understanding the microscopic mechanisms of silicon self-diffusion is important in predicting and modeling the diffusion of ultra shallow dopant profiles. As an example, we show experimental data and simulation fits of how these coupling effects play a role in the annealing of shallow BF2 ion implantation profiles. We conclude that relatively low temperature furnace cycles following high temperature rapid thermal anneals (RTA) have a significant effect on the minimum junction depth that can be achieved.


2004 ◽  
Vol 810 ◽  
Author(s):  
A. Satta ◽  
R. Lindsay ◽  
S. Severi ◽  
K. Henson ◽  
K. Maex ◽  
...  

ABSTRACTThe creation of ultra-shallow junction for CMOS devices at the sub-100 nm node is driving significant efforts in developing thermal processing to give rise to high dopant activation in combination with limited diffusion. Flash-assist Rapid Thermal Annealing™ (fRTP™) is a promising new annealing technique, which involves the heating of the bulk of the wafer to an intermediate temperature using rather conventional spike RTP, followed by a short and intense pulse of light localized on the implanted wafer surface.In this work, we have systematically investigated the junction formation of different implants under fRTP anneals in terms of profile and devices. Co-implanted Ge and F species provide more box-like profiles with improved activation. Although leakage currents are higher for fRTP-annealed junctions than for spike-annealed junctions, appropriate fRTP process parameters and correct process conditions provide a critical tool to control and reduce the leakage current of co-implanted fRTP junctions to acceptable levels. Proper implant and anneal are requested for minimizing pattern effect and improving device performance.


1997 ◽  
Vol 470 ◽  
Author(s):  
Daniel F. Downey ◽  
Sonu L. Daryanani ◽  
Marylou Meloni ◽  
Kristen M. Brown ◽  
Susan B. Felch ◽  
...  

ABSTRACT2. 0 keV 11B+, 2.2 keV 49BF2+ ion implanted and 1.0 kV Plasma Doped (PLAD) wafers of a dose of 1E15/cm2 were annealed at various times and temperatures in a variety of ambiente: 600 to 50,000 ppm O2 in N2; 5% NH3 in N2; N2O; N2 or Ar, in order to investigate the effects of the annealing ambient on the formation of ultra-shallow junctions. RGA data was collected during some (if the anneals to assist in identifying the complex surface chemistry responsible for boron out-diffusion. Subsequent to the anneals, ellipsometric, XPS, four-point probe sheet resistance and SJJVIS measurements were performed to further elucidate the effects of the different ambients on the r etained boron dose, the sheet resistance value, the RTP grown oxide layer and the junction depth. In the cases where oxygen was present, e.g. N2O and O2 in N2, an oxidation enhanced diffusion of the boron was observed. This was most dramatic for the N2O anneals, which at 1050°C 10s diffused the boron an additional 283 to 427 Å, depending on the particular doping condition and species. For the case of BF2 implants and PLAD, anneals in 5% NH3 in N2 reduced the junction depth by a nitridation reduced diffusion mechanism. RGA data indicated that the out-diffusion mechanisms for B and BF2 implanted wafers are different, with the BF2 exhibiting dopant loss mechanisms during the 950°C anneals, producing F containing compounds. B implants did not show doping loss mechanisms, ais observed by the RGA, until the 1050°C anneals and these signals did not contain F containing compounds. Equivalent effective energy boron implants of 8.9 keV BF2 vs. 2.0 keV B, however, indicated that the overall effect of the F in the BF2 implants is very beneficial in the creation of ultra-shallow junctions (compared to B implants): reducing the junction depth by 428 Å, and increasing the electrical activation (determined by SRP) by 11.7%, even though the retained dose (resulting from an increased out-diffusion of B), was decreased by 5.4%.


Author(s):  
Nik Hazura N. Hamat ◽  
Uda Hashim ◽  
Ibrahim Ahmad

Bagi merealisasikan MOSFET submikron, simpangan cetek ultra berkerintangan rendah diperlukan bagi menghalang kesan saluran pendek dan bagi meningkatkan peranti. Dalam kajian ini, pembentukan simpangan cetek ultra disimulasikan menggunakan perisian ATHENA dan Silvaco Inc. bagi memodelkan resapan dari SOD ke dalam silikon. Simpangan ultra P+N berkualiti tinggi dengan kedalaman 40 nm telah dibentuk menggunakan ciri–ciri yang baik dengan arus bocor serendah 0.5 na/cm2. Simpangan cetek kurang daripada turut diperoleh tetapi kualiti simpangan–simpangan cetek ini kurang baik disebabkan oleh arus bocor permukaan yang tinggi. Pembentukan simpangan dari resapan lapisan polisilikon di atas silikon diikuti oleh SOD di atasnya menghasilkan simpangan yang lebih cetek yang berkerintangan rendah. Kata kunci: Simpangan cetek ultra, resapan, SOD, ATHENA, MOSFET For realizing deep submicron MOSFETs, ultra shallow junctions with low sheet resistance and high doping concentrations are required to suppress short channel effects and to increase the performance. In this paper, ultra shallow junctions were simulated using ATHENA software package from Silvaco TCAD Tools to model the diffusion from spin on dopant (SOD) into silicon. High performance 40 nm P+N shallow junction fabricated by rapid thermal diffusion of B150 into silicon have been obtained. The junction showed very good characteristics with leakage currents as low as 0.5 nA/cm2. Shallow junctions less than 20 nm have also been obtained but the quality was not very good due to very high surface leakage current. Junction formation by diffusion of polysilicon layer on Si substrates then SOD layer deposition on top of it produced shallower junctions with low sheet resistance. Key words: Ultra shallow junction, MOSFET, ULSI, diffusion, spin on dopant, ATHENA, ATLAS


2013 ◽  
Vol 854 ◽  
pp. 141-145
Author(s):  
V.G. Litovchenko ◽  
B. Romanyuk ◽  
O. Oberemok ◽  
V. Popov ◽  
V. Melnik ◽  
...  

Ultra-shallow junctions (USJs) were formed by low-energy As ion implantation with the subsequent furnace annealing. It was found that the significant amount of oxygen is redistributed from the silicon bulk to the arsenic-implanted region. We present the effect of oxygen gettering at the creation of arsenic-doped USJs using the marker layer created by ion implantation of 18O isotope.


1998 ◽  
Vol 532 ◽  
Author(s):  
Kentaro Shibahara ◽  
Hiroaki Furumoto ◽  
Kazuhiko Egusa ◽  
Meishoku Koh ◽  
Shin Yokoyama

ABSTRACTWe have investigated the origins of sheet resistance increase in ultra shallow junctions formed by low energy As or Sb implantation. The increase is mainly attributed to dopant loss during annealing due to pileup of dopant at Si02/Si interface. This problem is common to As and Sb and will become more significant as the implantation energies are decreased. We found that the pileup can be classified into two stages from the time dependence of Sb SIMS depth profile .In the early stage of annealing the pileup is very fast and is probably related to the transport of the dopants due to solid phase epitaxial growth of an amorphized layer formed by the implantation. In the later stage the pileup is much slower and is considered to be governed by dopant diffusion.


1999 ◽  
Vol 568 ◽  
Author(s):  
Aditya Agarwal ◽  
Hans-J. Gossmann ◽  
Anthony T. Fiory

ABSTRACTOver the last couple of years rapid thermal annealing (RTA) equipment suppliers have been aggressively developing lamp-based furnaces capable of achieving ramp-up rates on the order of hundreds of degrees per second. One of the driving forces for adopting such a strategy was the experimental demonstration of 30nm p-type junctions by employing a ramp-up rate of ≈400°C/s. It was subsequently proposed that the ultra-fast temperature ramp-up was suppressing transient enhanced diffusion (TED) of boron which results from the interaction of the implantation damage with the dopant. The capability to achieve very high temperature ramp-rates was thus embraced as an essential requirement of the next generation of RTA equipment.In this paper, recent experimental data examining the effect of the ramp-up rate during spike-and soak-anneals on enhanced diffusion and shallow junction formation is reviewed. The advantage of increasing the ramp-up rate is found to be largest for the shallowest, 0.5-keV, B implants. At such ultra-low energies (ULE) the advantage arises from a reduction of the total thermal budget. Simulations reveal that a point of diminishing return is quickly reached when increasing the ramp-up rate since the ramp-down rate is in practice limited. At energies where TED dominates, a high ramp-up rate is only effective in minimizing diffusion if the implanted dose is sufficiently small so that the TED can be run out during the ramp-up portion of the anneal; for larger doses, a high ramp-up rate only serves to postpone the TED to the ramp-down duration of the anneal. However, even when TED is minimized at higher implant energies via high ramp-up rates, the advantage is unobservable due to the rather large as-implanted depth. It appears then that while spike anneals allow the activation of ULE-implanted dopants to be maximized while minimizing their diffusion the limitation imposed by the ramp-down rate compromises the advantage of very aggressive ramp-up rates.


2011 ◽  
Author(s):  
G. D. Papasouliotis ◽  
L. Godet ◽  
V. Singh ◽  
R. Miura ◽  
H. Ito ◽  
...  

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