The Influence of Stressing at Different Biases on the Electrical and Optical Properties of CdS/CdTe Solar Cells

2001 ◽  
Vol 668 ◽  
Author(s):  
S. W. Townsend ◽  
T. R. Ohno ◽  
V. Kaydanov ◽  
A. S. Gilmore ◽  
J. D. Beach ◽  
...  
Keyword(s):  
Anomalous Behavior ◽  
Open Circuit ◽  
Trap Level ◽  
Doping Density ◽  
Zero Bias ◽  
Cdte Solar Cells ◽  
Current Voltage ◽  
Depletion Width ◽  
Capacitance Voltage ◽  
Iv Curves

ABSTRACTCadmium Sulfide/Cadmium Telluride (CdS/CdTe) devices are subject to stress under various biases. Striking differences are observed with the Current-Voltage, and Capacitance- Voltage measurements for cells degraded at 100°C in dark under forward (FB), open circuit (OC), and reverse (RB) biases. RB stress provides the greatest degradation, and the apparent doping density profile shows anomalous behavior at the zero bias depletion width. Thin films of CdS, both doped and undoped, with Cu are characterized with photoluminescence (PL). The PL spectra from the CdS films are correlated with the CdS spectra from stressed devices, revealing that Cu signatures in the CdS layer of stressed devices are a function of stress biasing. Device modeling using AMPS-1D produces IV curves similar to that in RB degraded devices, by only varying the trap level concentration in the CdS layer.

Metal chloride passivation treatments for CdTe solar cells

2013 ◽  
Vol 1538 ◽  
pp. 269-274 ◽  
Author(s):  
Jennifer Drayton ◽  
Russell Geisthardt ◽  
John Raguse ◽  
James R. Sites
Keyword(s):  
Device Performance ◽  
Closed Space ◽  
Doping Density ◽  
Cdte Solar Cells ◽  
Density Depletion ◽  
Current Voltage ◽  
Depletion Width ◽  
Capacitance Voltage ◽  
Closed Space Sublimation ◽  
Space Sublimation

ABSTRACTThe traditional CdCl2 passivation of CdTe is expanded by adding other chlorides such as MgCl2, NaCl, and MnCl2 into the process through a two-step passivation procedure that combines closed space sublimation step with a vapor process. This allows the possibility of forming a highly doped field at the back of the device that could act as an electron reflector that could boost device performance by directing electrons back into the absorber layer and increasing the voltage while limiting recombination at the back of the device. The effects the two-step passivation process on device performance are characterized by current-voltage measurements, and by electroluminescence and laser-beam induced current images to show the degree of device uniformity. Additionally, capacitance voltage measurements are used to study doping density, depletion width, and possible formation of a field at the back of the device.

Electrical Characterization of In Schottky Contacts to Epitaxial n-In0.46Ga0.54P Grown on n+-GaAs by Mocvd

1996 ◽  
Vol 448 ◽  
Author(s):  
N. Marcano ◽  
A. Singh
Keyword(s):  
Barrier Height ◽  
Thermionic Emission ◽  
Electrical Characterization ◽  
Interface Layer ◽  
Zero Bias ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Direct Current Voltage ◽  
Etched Surface

AbstractIn/n-In0.46Ga0.54P Schottky diode was fabricated by thermal evaporation of In on chemically etched surface of In0.45Ga0.54P:Si epitaxial layer grown on highly doped n type GaAs. The In metal formed a high quality rectifying contact to In0.46Ga0.54P:Si with a rectification ratio of 500. The direct current-voltage/temperature (I-V/T) characteristics were non-ideal with the values of the ideality factor (n) between 1.26-1.78 for 400>T>260 K. The forward I-V data strongly indicated that the current was controlled by the generation-recombination (GR) and thermionic emission (TE) mechanisms for temperature in the range 260-400 K. From the temperature variation of the TE reverse saturation current, the values of (0.75±0.05)V and the (4.5±0.5)×10-5 Acm-2K-2 for the zero bias zero temperature barrier height (φoo) and modified effective Richardson constant were obtained. The 1 MHz capacitance-voltage (C-V) data for 260 K < T < 400 K was analyzed in terms of the C-2-V relation including the effect of interface layer to obtain more realistic values of the barrier height (φbo). The temperature dependence of φbo was described the relation φbo =(0.86±10.03) - (8.4±0.7)×l0-4T. The values of φoo, obtained by the I-V and C-V techniques agreed well.

Analysis of current–voltage and capacitance–voltage characteristics of Zr/p-Si Schottky diode with high series resistance

2020 ◽  
Vol 34 (10) ◽  
pp. 2050095
Author(s):  
Durmuş Ali Aldemir
Keyword(s):  
Barrier Height ◽  
Schottky Diode ◽  
Ideality Factor ◽  
Series Resistance ◽  
Zero Bias ◽  
Acceptor Concentration ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
High Series ◽  
Contact Parameters

Zr/p-Si Schottky diode was fabricated by DC magnetic sputtering of Zr on p-Si. Zr rectifying contact gave a zero bias barrier height of 0.73 eV and an ideality factor of 1.33 by current–voltage measurement. The experimental zero bias barrier height was higher than the value predicted by metal-induced gap states (MIGSs) and electronegativity theory. The forward bias current was limited by high series resistance. The series resistance value of 9840 [Formula: see text] was determined from Cheung functions. High value of the series resistance was ascribed to low quality ohmic contact. In addition to Cheung functions, important contact parameters such as barrier height and series resistance were calculated by using modified Norde method. Re-evaluation of modified Norde functions was realized in the direction of the method proposed by Lien et al. [IEEE Trans. Electron Devices 31 (1984) 1502]. From the method, the series resistance and ideality factor values were found to be as 41.49 [Formula: see text] and 2.08, respectively. The capacitance–voltage characteristics of the diode were measured as a function of frequency. For a wide range of applied frequency, the contact parameters calculated from [Formula: see text]–[Formula: see text] curves did not exhibit frequency dependence. The barrier height value of 0.71 eV which was in close agreement with the value of zero bias barrier height was calculated from [Formula: see text]–[Formula: see text] plot at 1 MHz. The values of acceptor concentration obtained from [Formula: see text]–[Formula: see text] curves showed consistency with actual acceptor concentration of p-Si.

scholarly journals Properties of Arsenic–Doped ZnTe Thin Films as a Back Contact for CdTe Solar Cells

Materials ◽  
2019 ◽  
Vol 12 (22) ◽  
pp. 3706 ◽  
Author(s):  
Ochai Oklobia ◽  
Giray Kartopu ◽  
Stuart J. C. Irvine
Keyword(s):  
Thin Films ◽  
Solar Cells ◽  
Open Circuit ◽  
Activation Process ◽  
Back Contact ◽  
Contact Activation ◽  
Doping Density ◽  
Cdte Solar Cells ◽  
Absorber Doping ◽  
P Type

As-doped polycrystalline ZnTe layers grown by metalorganic chemical vapor deposition (MOCVD) have been investigated as a back contact for CdTe solar cells. While undoped ZnTe films were essentially insulating, the doped layers showed significant rise in conductivity with increasing As concentration. High p-type carrier densities up 4.5 × 1018 cm−3 was measured by the Hall-effect in heavily doped ZnTe:As films, displaying electrical properties comparable to epitaxial ZnTe single crystalline thin films in the literature. Device incorporation with as-deposited ZnTe:As yielded lower photovoltaic (PV) performance compared to reference devices, due to losses in the open-circuit potential (VOC) and fill factor (FF) related to reducing p-type doping density (NA) in the absorber layer. Some minor recovery observed in absorber doping following a Cl-free post–ZnTe:As deposition anneal in hydrogen at 420 °C contributed to a slight improvement in VOC and NA, highlighting the significance of back contact activation. A mild CdCl2 activation process on the ZnTe:As back contact layer via a sacrificial CdS cap layer has been assessed to suppress Zn losses, which occur in the case of standard CdCl2 anneal treatments (CHT) via formation of volatile ZnCl2. The CdS sacrificial cap was effective in minimising the Zn loss. Compared to untreated and non-capped, mild CHT processed ZnTe:As back contacted devices, mild CHT with a CdS barrier showed the highest recovery in absorber doping and an ~10 mV gain in VOC, with the best cell efficiency approaching the baseline devices.

Efficient Cu(In, Ga)Se2 Based Solar Cells Prepared by Electrodeposition

2003 ◽  
Vol 763 ◽  
Author(s):  
D. Guimard ◽  
N. Bodereau ◽  
J. Kurdi ◽  
J.F. Guillemoles ◽  
D. Lincot ◽  
...  
Keyword(s):  
Band Gap ◽  
Room Temperature ◽  
Open Circuit Voltage ◽  
Spectral Response ◽  
Deposition Process ◽  
Open Circuit ◽  
Response Analysis ◽  
Cell Parameters ◽  
Current Voltage ◽  
Capacitance Voltage

AbstractCuInSe2 and Cu(In, Ga)Se2 precursor layers have been prepared by electrodeposition, with morphologies suitable for device completion. These precursor films were transformed into photovoltaic quality films after thermal annealing without any post-additional vacuum deposition process. Depending on the preparation parameters annealed films with different band gaps between 1eV and 1.5 eV have been prepared. The dependence of resulting solar cell parameters has been investigated. The best efficiency achieved is about 10,2 % for a band gap of 1.45 eV. This device presents an open circuit voltage value of 740 mV, in agreement with the higher band gap value. Device characterisations (current-voltage, capacitance-voltage and spectral response analysis) have been performed. Admittance spectroscopy at room temperature indicates the presence of two acceptor traps at 0.3 and 0.43 eV from the valance band with density of the order of 2. 1017 cm-3 eV-1.

Modeling and Simulations of Pd/n-ZnO Schottky Diode and its Comparison with Measurements

2009 ◽  
Vol 79-82 ◽  
pp. 1317-1320 ◽  
Author(s):  
S Faraz ◽  
Haida Noor ◽  
M. Asghar ◽  
Magnus Willander ◽  
Qamar-ul Wahab
Keyword(s):  
Schottky Diode ◽  
Room Temperature ◽  
Depletion Region ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Current Voltage Characteristics ◽  
Recombination Current ◽  
Experimental Values ◽  
Iv Curves ◽  
The Ideal

Modeling of Pd/ZnO Schottky diode has been performed together with a set of simulations to investigate its behavior in current-voltage characteristics. The diode was first fabricated and then the simulations were performed to match the IV curves to investigate the possible defects and their states in the bandgap. The doping concentration measured by capacitance-voltage is 3.4 x 1017 cm-3. The Schottky diode is simulated at room temperature and the effective barrier height is determined from current voltage characteristics both by measurements and simulations and it was found to be 0.68eV. The ideality factor obtained from simulated results is 1.06-2.04 which indicates that the transport mechanism is thermionic. It was found that the recombination current in the depletion region is responsible for deviation of experimental values from the ideal thermionic model deployed by the simulator.

Highly Arsenic Doped CdTe Layers for the Back Contacts of CdTe Solar Cells

2007 ◽  
Vol 1012 ◽  
Author(s):  
Vincent Barrioz ◽  
Yuri Y. Proskuryakov ◽  
Eurig W. Jones ◽  
Jon D. Major ◽  
Stuart J.C. Irvine ◽  
...  
Keyword(s):  
Solar Cells ◽  
Series Resistance ◽  
Chemical Vapour ◽  
Cdte Layer ◽  
Open Circuit ◽  
Organic Chemical ◽  
Back Contact ◽  
Cdte Solar Cells ◽  
Current Voltage ◽  
Metal Organic

AbstractIn an effort to overcome the lack of a suitable metal as an ohmic back contact for CdTe solar cells, a study was carried out on the potential for using a highly arsenic (As) doped CdTe layer with metallization. The deposition of full CdTe/CdS devices, including the highly doped CdTe:As and the CdCl2 treatment, were carried out by metal organic chemical vapour deposition (MOCVD), in an all-in-one process with no etching being necessary. They were characterized and compared to control devices prepared using conventional bromine-methanol back contact etching. SIMS and C-V profiling results indicated that arsenic concentrations of up to 1.5 × 1019 at·cm-3 were incorporated in the CdTe. Current-voltage (J-V) characteristics showed strong improvements, particularly in the open-circuit voltage (Voc) and series resistance (Rs): With a 250 nm thick doped layer, the series resistance was reduced from 9.8 Ω·cm2 to 1.6 Ω·cm2 for a contact area of 0.25 cm2; the J-V curves displayed no rollover, while the Voc increased by up to 70 mV (~ 12 % rise). Preliminary XRD data show that there may be an As2Te3 layer at the CdTe surface which could be contributing to the low barrier height of this contact.

The Electrical Characterization of p-CdTe/n-Si (111) Heterojunction Diode

2013 ◽  
Vol 702 ◽  
pp. 236-241 ◽  
Author(s):  
Mohammed A. Razooqi ◽  
Ameer F. Abdulameer ◽  
Adwan N. Hameed ◽  
Rasha A. Abdullaha ◽  
Ehsan I. Sabbar
Keyword(s):  
Carrier Transport ◽  
Electrical Characterization ◽  
Depletion Region ◽  
Cdte Film ◽  
Voltage Measurement ◽  
Zero Bias ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Tunneling Recombination ◽  
Evaporation Technique

p-CdTe film has been deposited on n-Si(111) substrate by thermal evaporation technique. The prepared CdTe/Si heterojunction diodes have been annealed at 573K. The capacitance-voltage measurements have studied for the prepared heterojunctions under 2 KHz frequencies. The capacitance-voltage measurement indicated that these diodes are abrupt. The capacitance at zero bias, the built in voltage and the doping concentration increased after annealing process while the zero bias depletion region width is decreased. The carrier transport mechanism for CdTe/Si diodes in dark is tunneling-recombination. From current-voltage measurement at dark, the values of ideality factor are 2.9 and 3.8. The values of reverse saturation current are 3.77×10-7and 9.36×10-8Amperes.

Investigation of the Trapping Mechanism for Transient Current-Voltage Behavior In CIGSS-Based Solar Cells

2001 ◽  
Vol 668 ◽  
Author(s):  
Pamela K. Johnson ◽  
James R. Sites ◽  
Dale E. Tarrant
Keyword(s):  
Elevated Temperatures ◽  
Light Exposure ◽  
Transient Behavior ◽  
Open Circuit ◽  
Trap Density ◽  
Transient Current ◽  
Photon Absorption ◽  
Cyclic Behavior ◽  
Zero Bias ◽  
Current Voltage

ABSTRACTSome thin-film CIS photovoltaic devices exhibit reversible transient behavior in their electrical properties induced by modestly elevated (70 - 100 °C) temperatures. This paper evaluates changes due to light exposure, thermal exposure, and applied bias in cells fabricated by Siemens Solar Industries (SSI). When a constant bias was maintained across cells subjected to elevated temperatures in the dark, and subsequent moderate- temperature light exposure, there was little reversible transient behavior. When the bias was cycled between zero and open-circuit voltage (VOC), independent of illumination, the fill factor (FF) decreased for zero bias and increased at VOC. Hence, it is the bias rather than photon absorption that drives the transient current-voltage behavior in these cells. Investigations of the relationship between trapping mechanisms and transient behavior using the frequency and temperature dependence of capacitance showed clear cyclic behavior in the trap-response frequency. Trap density profiles were found to be relatively independent of measurement temperature, and the total trap density varied only slightly with the bias cycle.

scholarly journals Electronic Behaviour of Schottky Diodes Fabricated from Electroplated CdSe Semiconductors

2018 ◽  
pp. 1-8
Author(s):  
O. I. Olusola ◽  
T. Ewetumo ◽  
T. A. Obagade ◽  
K. D. Adedayo
Keyword(s):  
Electronic Device ◽  
Schottky Diodes ◽  
Measurement Techniques ◽  
Excellent Performance ◽  
Device Structure ◽  
Doping Density ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Rectification Factor ◽  
Gold Metal

The fabrication of Schottky diodes using electroplated n- type CdSe thin films and gold metal contact have been successfully achieved. The electronic properties of the fabricated diodes with the device structure glass/FTO/n-CdSe/Au have been investigated by current-voltage (I-V) and capacitance-voltage (CV) measurement techniques. The I-V characteristics revealed a good rectifying behaviour with an ideality factor of 1.50, a potential barrier height (ϕb) >0.79 eV and rectification factor (RF) surpassing 102 at 1.0 V. Results from the C-V measurement showed that the fabricated Schottky diodes have doping density of ~1.61 × 1017 cm-3 and a built-in potential (Vbi) of 0.24 V which falls in the range of reported Vbi values for Schottky diodes. Both I-V and C-V parameters revealed that the CdSe Schottky diodes possess qualities for excellent performance in electronics circuit or as an electronic device.  

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