Charge Controlled Silicon Carbide Switching Devices

2004 ◽  
Vol 815 ◽  
Author(s):  
Peter Friedrichs

AbstractCharge controlled power switching devices fabricated in 4H-Silicon Carbide are discussed in this paper. After comparing possible structures, results on prototype devices are presented. The presentation will give an overview about the developments of SiC power switches at SiCED, in addition some potential applications serving as an accelerator for the SiC power switch development will be sketched. The performance of vertical JFETs will be analyzed in detail. These can be operated as a single device as well as in combination with a low voltage silicon power MOSFET. The result of the hybrid assembly is a normally off device which behaves for the user more and more like a classical MOSFET with respect to the input as well as the output characteristic. Several improvements where performed which make the device more attractive for the customer. It will be shown which factors drive these optimization and how they can be implemented. Although the primary target for this device is the >1000V blocking voltage range, it will be discussed how the huge 600V power switch market can be made accessible for SiC power devices too. Intensively the high temperature performance of SiC JFETs and Si/SiC cascodes is discussed. Additionally, other developments like silicon power MOSFETs or high voltage switches will be mentioned.

Author(s):  
Martin J. Carra ◽  
Hernan Tacc ◽  
Jose Lipovetzky

<p>Silicon Carbide (SiC), new power switches (PSW) require new driver circuits which can take advantage of their new capabilities. In this paper a novel Gallium Nitride (GaN) based gate driver is proposed as a solution to control SiC power switches. The proposed driver is implemented and is performance compared with its silicon (Si) counterparts on a hard switching environment. A thorough evaluation of the energy involved in the switching process is presented showing that the GaN based circuit exhibits similar output losses but reduces the control power needed to operate at a specified frequency.</p>


2006 ◽  
Vol 527-529 ◽  
pp. 1449-1452 ◽  
Author(s):  
Yang Sui ◽  
Ginger G. Walden ◽  
Xiao Kun Wang ◽  
James A. Cooper

We compare the on-state characteristics of five 4H-SiC power devices designed to block 20 kV. At such a high blocking voltage, the on-state current density depends heavily on the degree of conductivity modulation in the drift region, making the IGBT and thyristor attractive devices for high blocking voltages.


2012 ◽  
Vol 717-720 ◽  
pp. 1307-1310
Author(s):  
Krishna Shenai ◽  
Krushal Shah

Simple, physics-based, and accurate circuit models are reported for GaN power HEMTs and inductors; these models are then used to design high-performance chip-scale synchronous buck (SB) power converters to provide agile point-of-load (POL) low-voltage ( down to 1V) high-current (up to 10A) power to portable mobile devices from a battery. Excellent agreement between the measured and simulated results is demonstrated for load regulation for a 19V/1.2V, 800 kHz SB converter; for comparison, the same converter performance using the best commercially available state-of-the-art silicon power MOSFETs is also evaluated. It is shown that the conventional approach used for estimating power loss of a SB power converter is in error; a new application-specific Figure of Merit (FOM) for power switches is proposed that accounts for both input and output switching losses.


2011 ◽  
Vol 679-680 ◽  
pp. 625-628
Author(s):  
Petre Alexandrov ◽  
Xue Qing Li ◽  
Jian Hui Zhao

An optically controlled power switch based on 4H-SiC Trenched and Implanted Vertical JFETs (TIVJFET) was developed that comprises three parts: an LED light-source driver, light-triggered integrated gate buffer driver, and vertical high power normally-off switch. The light-triggered integrated gate buffer driver includes a photodiode and four stages of low voltage 4H-SiC TIVJFETs, which are hybrid integrated. Optically gated power switching was experimentally demonstrated with a maximum switching frequency of about 50 kHz, the system performance limiting factors were clearly identified and experimentally confirmed, and ways to substantially increase the switching frequency were shown. From calculations, based on realistically possible system parameters values, it could be seen that a maximum switching frequency around 1 MHz is theoretically possible with a proper choice of light source, detector, and buffer transistor parameters.


Energies ◽  
2020 ◽  
Vol 13 (10) ◽  
pp. 2537
Author(s):  
Shin-Ju Chen ◽  
Sung-Pei Yang ◽  
Chao-Ming Huang ◽  
Yu-Hua Chen

A novel interleaved high step-up DC–DC converter applied for applications in photovoltaic systems is proposed in this paper. The proposed configuration is composed of three-winding coupled inductors, voltage multiplier cells and a clamp circuit. The step-up voltage gain is effectively increased, owing to the voltage-stack and voltage-lift techniques using the voltage multiplier cells. The leakage inductor energy is recycled by the clamp circuit to avoid the voltage surge on a power switch. The low-voltage-rated power switches with low on-state resistances and costs can be used to decrease the conduction losses and increase the conversion efficiency when the voltage stresses of power switches for the converter are considerably lower than the high output voltage. The reverse-recovery problems of diodes are mitigated by the leakage inductances of the coupled inductors. Moreover, both the input current ripple and the current stress on each power switch are reduced, owing to the interleaved operation. The operating principle and steady-state analysis of the proposed converter are thoroughly presented herein. A controller network is designed to diminish the effect of the variations of input voltage and output load on the output voltage. Finally, the experimental results for a 1 kW prototype with 28–380 V voltage conversion are shown to demonstrate its effectiveness and performance.


This paper presents simulation of a 5-level cascaded H-bridge multilevel inverter, with reduce the number of power switching devices in the current flow direction. The propose topology consists of a five switches with double DC sources. The analysis is designing a new topology for a singlephase cascaded multilevel H-bridge inverter (CHBMLI), with a focus on the number of power switching devices in the current flow direction.Conduction and switching losses have to be reduced to achieve higher performance operation of power electronic devices.Multilevel inverters are designed to achieve the desired voltages of output from different DC sources.A analysis of the simulated power loss values is deals with based on how the power switch reduction led to the loss decreases.


Author(s):  
Ian Kearney ◽  
Hank Sung

Abstract Low voltage power MOSFETs often integrate voltage spike protection and gate oxide ESD protection. The basic concept of complete-static protection for the power MOSFETs is the prevention of static build-up where possible and the quick, reliable removal of existing charges. The power MOSFET gate is equivalent to a low voltage low leakage capacitor. The capacitor plates are formed primarily by the silicon gate and source metallization. The capacitor dielectric is the silicon oxide gate insulation. Smaller devices have less capacitance and require less charge per volt and are therefore more susceptible to ESD than larger MOSFETs. A FemtoFETTM is an ultra-small, low on-resistance MOSFET transistor for space-constrained handheld applications, such as smartphones and tablets. An ESD event, for example, between a fingertip and the communication-port connectors of a cell phone or tablet may cause permanent system damage. Through electrical characterization and global isolation by active photon emission, the authors identify and distinguish ESD failures. Thermographic analysis provided additional insight enabling further separation of ESD failmodes. This paper emphasizes the role of failure analysis in new product development from the create phase through to product ramp. Coupled with device electrical simulation, the analysis observations led to further design enhancement.


Processes ◽  
2021 ◽  
Vol 9 (7) ◽  
pp. 1112
Author(s):  
Yu-En Wu ◽  
Jyun-Wei Wang

This study developed a novel, high-efficiency, high step-up DC–DC converter for photovoltaic (PV) systems. The converter can step-up the low output voltage of PV modules to the voltage level of the inverter and is used to feed into the grid. The converter can achieve a high step-up voltage through its architecture consisting of a three-winding coupled inductor common iron core on the low-voltage side and a half-wave voltage doubler circuit on the high-voltage side. The leakage inductance energy generated by the coupling inductor during the conversion process can be recovered by the capacitor on the low-voltage side to reduce the voltage surge on the power switch, which gives the power switch of the circuit a soft-switching effect. In addition, the half-wave voltage doubler circuit on the high-voltage side can recover the leakage inductance energy of the tertiary side and increase the output voltage. The advantages of the circuit are low loss, high efficiency, high conversion ratio, and low component voltage stress. Finally, a 500-W high step-up converter was experimentally tested to verify the feasibility and practicability of the proposed architecture. The results revealed that the highest efficiency of the circuit is 98%.


Author(s):  
Qiang Chen ◽  
Jianping Xu ◽  
Fei Zeng ◽  
Rui Huang ◽  
Lei Wang

Author(s):  
Gianpaolo Romano ◽  
Asad Fayyaz ◽  
Michele Riccio ◽  
Luca Maresca ◽  
Giovanni Breglio ◽  
...  

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