scholarly journals Rewriting Environment for Arithmetic Circuit Verification

10.29007/rswk ◽  
2018 ◽  
Author(s):  
Cunxi Yu ◽  
Atif Yasin ◽  
Tiankai Su ◽  
Alan Mishchenko ◽  
Maciej Ciesielski

The paper describes a practical software tool for the verification of integer arithmetic circuits. It covers different types of integer multipliers, fused add-multiply circuits, and constant dividers - in general, circuits whose computation can be represented as a polynomial. The verification uses an algebraic model of the circuit and is accomplished by rewriting the polynomial of the binary encoding of the primary outputs (output signature), using the polynomial models of the logic gates, into a polynomial over the primary inputs (input signature). The resulting polynomial represents arithmetic function implemented by the circuit and hence can be used to extract functional specification from its gate-level implementation. The rewriting uses an efficient And-Inverter Graph (AIG) representation to enable extraction of the essential arithmetic components of the circuit. The tool is integrated with the popular ABC system. Its efficiency is illustrated with impressive results for integer multipliers, fused add-multiply circuits, and divide-by-constant circuits. The entire verification system is offered in an open source ABC environment together with an extensive set of benchmarks.

Computers ◽  
2022 ◽  
Vol 11 (1) ◽  
pp. 11
Author(s):  
Padmanabhan Balasubramanian ◽  
Raunaq Nayar ◽  
Okkar Min ◽  
Douglas L. Maskell

Approximate arithmetic circuits are an attractive alternative to accurate arithmetic circuits because they have significantly reduced delay, area, and power, albeit at the cost of some loss in accuracy. By keeping errors due to approximate computation within acceptable limits, approximate arithmetic circuits can be used for various practical applications such as digital signal processing, digital filtering, low power graphics processing, neuromorphic computing, hardware realization of neural networks for artificial intelligence and machine learning etc. The degree of approximation that can be incorporated into an approximate arithmetic circuit tends to vary depending on the error resiliency of the target application. Given this, the manual coding of approximate arithmetic circuits corresponding to different degrees of approximation in a hardware description language (HDL) may be a cumbersome and a time-consuming process—more so when the circuit is big. Therefore, a software tool that can automatically generate approximate arithmetic circuits of any size corresponding to a desired accuracy would not only aid the design flow but also help to improve a designer’s productivity by speeding up the circuit/system development. In this context, this paper presents ‘Approximator’, which is a software tool developed to automatically generate approximate arithmetic circuits based on a user’s specification. Approximator can automatically generate Verilog HDL codes of approximate adders and multipliers of any size based on the novel approximate arithmetic circuit architectures proposed by us. The Verilog HDL codes output by Approximator can be used for synthesis in an FPGA or ASIC (standard cell based) design environment. Additionally, the tool can perform error and accuracy analyses of approximate arithmetic circuits. The salient features of the tool are illustrated through some example screenshots captured during different stages of the tool use. Approximator has been made open-access on GitHub for the benefit of the research community, and the tool documentation is provided for the user’s reference.


2018 ◽  
Vol 17 (1) ◽  
Author(s):  
Md Ibnul Bin Kader Arnub ◽  
M Tanseer Ali

The double gate MOSFET, where two gates are fabricated along the length of the channel one after another. Design of logic gates is one of the most eminent application of Double Gate MOSFET. Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are shown to be promising for digital logic applications. This paper describes the design and analysis of different types of logic gates using GaN based DG-MOSFET. The gate length (LG) is kept constant at 10.6 nm. The gate voltage varies from 0 to 1 V for the device switching from turn OFF to turn ON-state. For the device with HfO2 as gate oxide, the ON-state current (ION) and OFF-state current (IOFF) are found 8.11×10-3 and 6.38605×10-9A/μm respectively. The leakage current is low for the device with HfO2 as compared to that for the device with ZrO2. The subthreshold swing (SS) is 68.7408 mV/dec for the device with HfO2.


2021 ◽  
Vol 8 ◽  
pp. 48-60
Author(s):  
Agnieszka Graczyk-Jarzynka

The chimeric antigen receptor (CAR) technology has become one of the greatest breakthroughs in immunotherapy in recent years. CARs facilitate the attack of immune effector cells such as T cells or NK cells being directed at virtually any molecule presented on the surface of a cancer cell. The exceptional efficacy of CAR receptors has been demonstrated for the CD19 molecule found on B cell-derived tumors. However, the efficacy of CAR-T therapy targeting other antigens is less satisfactory while being quite frequently associated with a number of adverse effects. The adverse effects are mainly due to the effector cells being activated in a simplified manner; the most serious effect consists in the antigen being detected on healthy cells (“the on-target, off-tumor” effect). A number of ongoing studies aim at enhancing the safety profile of therapies making use of CAR--modified effector cells. In part, this can be achieved by optimizing the structure of the CAR receptor itself or by using transient transfection to modify the effector cells. A more complex solution consists in obtaining remote control over CAR-T lymphocytes within the patient’s body. This approach makes use of different types of systems that limit the functionality of CAR-T cells in the patient, such as suicide genes, regulation at the transcriptional and protein levels, different types of adapters being used to activate the CAR-T cells. The most advanced system consists in the use of logic gates which make it possible for CAR-T cells to recognize and „understand” incoming signals from the environment, allowing for a certain degree of autonomy in the activation of the cells’ cytotoxic potential. This study presents key strategies to improve the safety profiles of CAR-T therapies.


Author(s):  
Nurul I. Sarkar ◽  
Khaleel I. Petrus

Boolean algebra, minimization of Boolean expressions, and logic gates are often included as subjects in electronics, computer science, information technology, and engineering courses as computer hardware and digital systems are a fundamental component of IT systems today. We believe that students learn minimization of Boolean expressions better if they are given interactive practical learning activities that illustrate theoretical concepts. This chapter describes the development and use of a software tool (named LOGIC-Minimiser) as an aid to enhance teaching and learning minimization of Boolean expressions.


2018 ◽  
Vol 7 (2.23) ◽  
pp. 464
Author(s):  
Angshuman Khan ◽  
Sudip Halder ◽  
Shubhajit Pal

This article includes a simple design of Vedic square calculator for Application Specific Integrated Circuit (ASIC). This is a straightforward and innovative design of Vedic calculator using only few basic digital logic gates. Among the all sutras and sub sutras of ancient Vedic mathematics, the sutra ‘Urdhva Tiryagbyham’ is used here for square calculation of two bits numbers which results in an effortless and faster method of square calculation than all the existing methods. The design and minimization of the circuit has been carried out to achieve a standard architecture that is the simplest too. Here Xilinx ISE software tool is used rigorously to simulate the architecture.  


2007 ◽  
Vol 15 (3) ◽  
pp. 199-213 ◽  
Author(s):  
Arthur C. Graesser ◽  
Moongee Jeon ◽  
Yan Yan ◽  
Zhiqiang Cai

Discourse cohesion is presumably an important facilitator of comprehension when individuals read texts and hold conversations. This study investigated components of cohesion and language in different types of discourse about Newtonian physics: A textbook, textoids written by experimental psychologists, naturalistic tutorial dialoguebetween expert human tutors and college students, andAutoTutor tutorial dialogue between a computer tutor and students (AutoTutor is an animated pedagogical agent that helps students learn about physics by holding conversations in natural language). We analyzed the four types of discourse with Coh-Metrix, a software tool that measures discourse on different components of cohesion, language, and readability. The cohesion indices included co-reference, syntactic and semantic similarity, causal cohesion, incidence of cohesion signals (e.g., connectives, logical operators), and many other measures. Cohesion data were quite similar for the two forms of discourse in expository monologue (textbooks and textoids) and for the two types of tutorial dialogue (i.e., students interacting with human tutors and AutoTutor), but very different between the discourse of expository monologue and tutorial dialogue. Coh-Metrix was also able to detect subtle differences in the language and discourse of AutoTutor versus human tutoring.


2021 ◽  
Author(s):  
Mukkamala. S.N.V. Jitendra ◽  
Y. Radhika

Recommender systems play a vital role in e-commerce. It is a big source of a market that brings people from all over the world to a single place. It has become easy to access and reach the market while sitting anywhere. Recommender systems do a major role in the commerce mobility go smoothly easily as it is a software tool that helps in showing or recommending items based on user’s preferences by analyzing their taste. In this paper, we make a recommender system that would be specifically for music applications. Different people listen to different types of music, so we make note of their taste in music and suggest to them the next song based on their previous choice. This is achieved by using a popularity algorithm, classification, and collaborative filtering. Finally, we make a comparison of the built system for its effectiveness with different evaluation metrics.


1988 ◽  
Vol 17 (239) ◽  
Author(s):  
Joan Boyar ◽  
Gudmund Skovbjerg Frandsen ◽  
Carl Sturtivant

We define a new structured and general model of computation: circuits using arbitrary fan- in arithmetic gates over the characteristic two finite fields (<strong>F</strong>_2n). These circuits have only one input and one output. We show how they correspond naturally to boolean computations with n inputs and n outputs. We show that if circuit sizes are polynomially related then the arithmetic circuit depth and the threshold circuit depth to compute a given function differ by at most a constant factor. We use threshold circuits that allow arbitrary integer weights; however, we show that when compared to the usual threshold model, the depth measure of this generalised model only differs by at most a constant factor (at polynomial size). The fan-in of our arithmetic model is also unbounded in the most generous sense: circuit size is measured as the number of Sum and ½ gates; there is no bound on the number of ''wires'' . We show that these results are provable for any ''reasonable'' correspondance between bit strings of n-bits and elements of <strong>F</strong>_ 2n. And, we find two distinct characterizations of ''reasonable''. Thus, we have shown that arbitrary fan-in arithmetic computations over <strong>F</strong>_ 2n constitute a precise abstraction of boolean threshold computations with the pleasant property that various algebraic laws have been recovered.


2009 ◽  
pp. 1334-1344
Author(s):  
Nurul I. Sarkar ◽  
Khaleel I. Petrus

Boolean algebra, minimization of Boolean expressions, and logic gates are often included as subjects in electronics, computer science, information technology, and engineering courses as computer hardware and digital systems are a fundamental component of IT systems today. We believe that students learn minimization of Boolean expressions better if they are given interactive practical learning activities that illustrate theoretical concepts. This chapter describes the development and use of a software tool (named LOGIC-Minimiser) as an aid to enhance teaching and learning minimization of Boolean expressions.


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