Case Study of a DDR Loopback Test Failure Encountered on a Map Ball Grid Array Packaged Device

2017 ◽  
Author(s):  
Jose Z. Garcia ◽  
Kris Dickson
Keyword(s):  
Failure Analysis ◽  
Ball Grid Array ◽  
Analysis Techniques ◽  
Root Cause ◽  
Test Methodology ◽  
Cause Of Failure ◽  
Test Failure

Abstract This paper describes how a DDR loopback test failure was analyzed successfully after being repackaged from an MBGA into a TBGA package substrate. DDR loopback test methodology is discussed as well as the advanced failure analysis techniques that were used to identify the root cause of failure.

Case Study—Failure Analysis of a Multiplexer

2016 ◽  
Author(s):  
Michael Woo ◽  
Marcos Campos ◽  
Luigi Aranda
Keyword(s):  
Failure Analysis ◽  
High Reliability ◽  
Component Failure ◽  
Root Cause ◽  
Knowing That ◽  
Cause Of Failure ◽  
The Cost

Abstract A component failure has the potential to significantly impact the cost, manufacturing schedule, and/or the perceived reliability of a system, especially if the root cause of the failure is not known. A failure analysis is often key to mitigating the effects of a componentlevel failure to a customer or a system; minimizing schedule slips, minimizing related accrued costs to the customer, and allowing for the completion of the system with confidence that the reliability of the product had not been compromised. This case study will show how a detailed and systemic failure analysis was able to determine the exact cause of failure of a multiplexer in a high-reliability system, which allowed the manufacturer to confidently proceed with production knowing that the failure was not a systemic issue, but rather that it was a random “one time” event.

Failure Analysis of CDM-ESD Damage in a GaAs RFIC

2000 ◽  
Author(s):  
Amy Poe ◽  
Steve Brockett ◽  
Tony Rubalcava
Keyword(s):  
Radio Frequency ◽  
Failure Analysis ◽  
Integrated Circuit ◽  
Production Test ◽  
Analysis Techniques ◽  
Device Model ◽  
Charged Device ◽  
Subsequent Failure

Abstract The intent of this work is to demonstrate the importance of charged device model (CDM) ESD testing and characterization by presenting a case study of a situation in which CDM testing proved invaluable in establishing the reliability of a GaAs radio frequency integrated circuit (RFIC). The problem originated when a sample of passing devices was retested to the final production test. Nine of the 200 sampled devices failed the retest, thus placing the reliability of all of the devices in question. The subsequent failure analysis indicated that the devices failed due to a short on one of two capacitors, bringing into question the reliability of the dielectric. Previous ESD characterization of the part had shown that a certain resistor was likely to fail at thresholds well below the level at which any capacitors were damaged. This paper will discuss the failure analysis techniques which were used and the testing performed to verify the failures were actually due to ESD, and not caused by weak capacitors.

Advanced IR-OBIRCH Analysis Technique for High Isb Failure Analysis

2010 ◽  
Author(s):  
Kuo Hsiung Chen ◽  
Wen Sheng Wu ◽  
Yu Hsiang Shu ◽  
Jian Chan Lin
Keyword(s):  
Failure Analysis ◽  
Failure Mechanisms ◽  
Fault Localization ◽  
Resistance Change ◽  
The Real ◽  
Analysis Techniques ◽  
Analysis Technique ◽  
Leakage Failure ◽  
Failure Site

Abstract IR-OBIRCH (Infrared Ray – Optical Beam Induced Resistance Change) is one of the main failure analysis techniques [1] [2] [3] [4]. It is a useful tool to do fault localization on leakage failure cases such as poor Via or contact connection, FEoL or BEoL pattern bridge, and etc. But the real failure sites associated with the above failure mechanisms are not always found at the OBIRCH spot locations. Sometimes the real failure site is far away from the OBIRCH spot and it will result in inconclusive PFA Analysis. Finding the real failure site is what matters the most for fault localization detection. In this paper, we will introduce one case using deep sub-micron process generation which suffers serious high Isb current at wafer donut region. In this case study a BEoL Via poor connection is found far away from the OBIRCH spots. This implies that layout tracing skill and relation investigation among OBIRCH spots are needed for successful failure analysis.

Root Cause Analysis for Pin Leakage

2016 ◽  
Author(s):  
Zhigang Song ◽  
Jochonia Nxumalo ◽  
Manuel Villalobos ◽  
Sweta Pendyala
Keyword(s):  
Failure Analysis ◽  
Root Cause Analysis ◽  
Advanced Technology ◽  
Process Step ◽  
Cause Analysis ◽  
Hard Mask ◽  
Technology Node ◽  
Root Cause ◽  
Tools And Techniques

Abstract Pin leakage continues to be on the list of top yield detractors for microelectronics devices. It is simply manifested as elevated current with one pin or several pins during pin continuity test. Although many techniques are capable to globally localize the fault of pin leakage, root cause analysis and identification for it are still very challenging with today’s advanced failure analysis tools and techniques. It is because pin leakage can be caused by any type of defect, at any layer in the device and at any process step. This paper presents a case study to demonstrate how to combine multiple techniques to accurately identify the root cause of a pin leakage issue for a device manufactured using advanced technology node. The root cause was identified as under-etch issue during P+ implantation hard mask opening for ESD protection diode, causing P+ implantation missing, which was responsible for the nearly ohmic type pin leakage.

Troubleshooting Cable Deployed Thru Tubing Electrical Submersible Pumps: A Case Study from South East Asia

2021 ◽  
Author(s):  
Saurabh Anand ◽  
Eadie Azahar B Rosland ◽  
Elsayed Ouda Ghonim ◽  
Latief Riyanto ◽  
Khairul Azhar B Abu Bakar ◽  
...  
Keyword(s):  
Low Cost ◽  
Power Cable ◽  
Related Data ◽  
Root Cause ◽  
Artificial Lift ◽  
Electrical Submersible Pumps ◽  
Cause Of Failure ◽  
Water Cut ◽  
Discharge Pressure

Abstract PETRONAS had embarked on an ambitious thru tubing ESP journey in 2016 and had installed global first truly rig less offshore Thru Tubing ESP (TTESP) in 2017. To replicate the success of the first installation, TTESP's were installed in Field – T. However, all these three TTESP's failed to produce fluids to surface. This paper provides the complete details of the troubleshooting exercise that was done to find the cause of failure in these wells. The 3 TTESP's in Field – T were installed as per procedure and was ready to be commissioned. However, during the commissioning, it was noticed that the discharge pressure of the ESP did not build-up and the TTESP's tripped due to high temperature after 15 – 30 mins of operation. Hence none of the 3 TTESP's could be successfully commissioned. Considering the strategic importance of TTESP's in PETRONAS's artificial lift plans, detailed troubleshooting exercise was done to find the root cause of failure to produce in these three wells. This troubleshooting exercise included diesel bull heading which gave some key pump performance related data. The three TTESP's installed in Field – T were of size 2.72" and had the potential to produce an average 1500 BLPD at 80% water cut. The TTESP deployment was fully rigless and was installed using 0.8" ESP power cable. The ESP and the cable was hung-off from the surface using a hanger – spool system. The entire system is complex, and the installation procedure needs to be proper to ensure a successful installation. The vast amount of data gathered during the commissioning and troubleshooting exercise was used for determining the failure reason and included preparation of static and dynamic well ESP model. After detailed technical investigative work, the team believes to have found the root cause of the issue which explains the data obtained during commission and troubleshooting phase. The detailed troubleshooting workflow and actual data obtained will be presented in this paper. A comprehensive list of lessons learnt will also be presented which includes very important aspects that needs to be considered during the design and installation of TTESP. The remedial plan is finalized and will be executed during next available weather window. The key benefit of a TTESP installation is its low cost which is 20% – 30% of a rig-based ESP workover in offshore. Hence it is expected that TTESP installations will pick-up globally and it's important for any operator to fully understand the TTESP systems and the potential pain points. PETRONAS has been a pioneer in TTESP field, and this paper will provide details on the learning curve during the TTESP journey.

scholarly journals Konflik Penolakan Ritual Doa Leluhur Paguyuban Padma Buana di Pedukuhan Mangir Bantul, Yogyakarta

SMART ◽  
2020 ◽  
Vol 6 (1) ◽  
pp. 49-62
Author(s):  
Setyo Boedi Oetomo
Keyword(s):  
Factor Analysis ◽  
Cultural Tourism ◽  
Analysis Techniques ◽  
Root Cause ◽  
Multiple Factors ◽  
Tourism Management ◽  
The People ◽  
Local Residents ◽  
The Village

The people of Yogyakarta are known for their tolerance, where people of different religions can coexist peacefully especially with Javanese traditions. But in Mangir, a village in Bantul, Yogyakarta, in November 12, 2019, there was a case of local residents rejecting the procession of ancestral prayer rituals by the Paguyuban Padma Buana (PPB) who claims to be followers of Javanese Hinduism. This study aimed at disclosing the elements and roots of conflict from the Mangir community's rejection towards Paguyuban Padma Buana. As a case study, it used conflict analysis approach through timeline and factor analysis techniques. The results showed that the open conflict between the two groups has occurred since 2012 with the main issue of syncretic ritual practices of Hinduism, Buddhism, and Kejawen (Javanism) that involve people from various religions. In addition, the Maha Lingga Padma Buana Temple as a place of whorship and rituals has also the license problems. Reconciliation was carried out between residents with the Padma Buana followers in 2015. Unfortunately it was violated by the Paguyuban Padma Buana and became a trigger of conflict back in 2019. The cause of this conflict is multiple factors, all of which are interrelated. However, the root cause of the problem among Mangir people is mostly related to traditional revivalism and the distribution of cultural tourism management authorities. This conflict makes them polarized and vulnerable to interests that can create the village atmosphere worse

Subsea Gas Well Late Life Restart Lesson Learned: Failure Analysis and Operating Strategy

2021 ◽  
Author(s):  
Song Wang ◽  
Lawrence Khin Leong Lau ◽  
Wu Jun Tong ◽  
Kun An ◽  
Jiang Nan Duan ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Late Life ◽  
Flow Assurance ◽  
Gas Well ◽  
Subsea Pipeline ◽  
Operating Strategy ◽  
Root Cause ◽  
Financial Impacts ◽  
Transient Multiphase Flow

Abstract This paper elucidates the importance of flow assurance transient multiphase modelling to ensure uninterrupted late life productions. This is discussed in details through the case study of shut-in and restart scenarios of a subsea gas well (namely Well A) located in South China Sea region. There were two wells (Well A and Well B) producing steadily prior to asset shut-in, as a requirement for subsea pipeline maintenance works. However, it was found that Well A failed to restart while Well B successfully resumed production after the pipeline maintenance works. Flow assurance team is called in order to understand the root cause of the failed re-start of Well A to avoid similar failure for Well B and other wells in this region. Through failure analysis of Well A, key root cause is identified and associated operating strategy is proposed for use for Well B, which is producing through the same subsea infrastructure. Transient multiphase flow assurance model including subsea Well A, subsea Well B, associated spools, subsea pipeline and subsea riser is developed and fully benchmarked against field data to ensure realistic thermohydraulics representations of the actual asset. Simulation result shows failed restart of Well A and successful restart of Well B, which fully matched with field observations. Further analysis reveals that liquid column accumulated within the wellbore of Well A associates with extra hydrostatic head which caused failed well restart. Through a series of sensitivity analysis, the possibility of successful Well A restart is investigated by manipulating topsides back pressure settings and production flowrates prior to shut-in. These serve as a methodology to systematically analyze such transient scenario and to provide basis for field operating strategy. The analysis and strategy proposed through detailed modelling and simulation serves as valuable guidance for Well B, should shut-in and restart operation is required. This study shows the importance of modelling prior to late life field operations, in order to avoid similar failed well restart, which causes significant production and financial impacts.

Reliability Estimation and Failure Analysis of Multilayer Ceramic Chip Capacitors

2003 ◽  
Vol 17 (08n09) ◽  
pp. 1318-1323 ◽  
Author(s):  
Seok Jun Yang ◽  
Jin Woo Kim ◽  
Dong Su Ryu ◽  
Myung Soo Kim ◽  
Joong Soon Jang
Keyword(s):  
Failure Analysis ◽  
Life Stress ◽  
Control Unit ◽  
Accelerated Life Testing ◽  
Reliability Estimation ◽  
Accelerated Life Test ◽  
Root Cause ◽  
Accelerated Life ◽  
Cause Of Failure ◽  
Multilayer Ceramic

This paper presents the failure analysis and the reliability estimation of a multilayer ceramic chip capacitor. For the failed samples used in an automobile engine control unit, failure analysis was made to identify the root cause of failure and it was shown that the migration and the avalanche breakdown were the dominant failure mechanisms. Next, an accelerated life testing was designed to estimate the life of the MLCC. It is assumed that Weibull lifetime distribution and the life-stress relationship proposed Prokopowicz and Vaskas. The life-stress relationship and the acceleration factor are estimated by analyzing the accelerated life test data.

Application of Advanced Back-Side Optical Techniques in ASICs

2013 ◽  
Vol 21 (3) ◽  
pp. 30-35
Author(s):  
Douglas Martin ◽  
Samuel Beilin ◽  
Brett Hamilton ◽  
Darin York ◽  
Philip Baker ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Photon Emission ◽  
Back Side ◽  
Voltage Imaging ◽  
Root Cause ◽  
Silicon Transistors ◽  
Cause Of Failure ◽  
Metal Interconnects ◽  
Application Specific

Failure analysis is important in determining root cause for appropriate corrective action. In order to perform failure analysis of microelectronic application-specific integrated circuits (ASICs) delidding the device is often required. However, determining root cause from the front side is not always possible due to shadowing effects caused by the ASIC metal interconnects. Therefore, back-side polishing is used to reveal an unobstructed view of the ASIC silicon transistors. This paper details how back-side polishing in conjunction with laser-scanned imaging (LSI), laser voltage imaging (LVI), laser voltage probing (LVP), photon emission microscopy (PEM), and laser-assisted device alterations (LADA) were used to uncover the root cause of failure of two ASICs.

Semiconductor Wear Out at Nuclear Power Plants

2000 ◽  
Author(s):  
James B. Riddle
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Nuclear Power ◽  
Power Plants ◽  
Nuclear Power Plants ◽  
Light Output ◽  
Analysis Techniques ◽  
Root Cause ◽  
Corrective Actions ◽  
Control Circuits

Abstract This paper will examine semiconductor wear out at San Onofre Nuclear Generation Station (SONGS). The topics will include case studies, failure mechanisms, diagnostic techniques, failure analysis techniques and root cause corrective actions. Nuclear power plants are unique in that instrumentation and control circuits are continuously energized, are periodically tested, and have been in operation for greater than 25 years. Root cause evaluations at SONGS have identified numerous semiconductor failures due to wear out. Case studies include light output deterioration in opto-isolators, junction alloying failures of transistors and integrated circuits and parametric shifts in operational amplifiers. In most cases the devices do not fail catastrophically but degraded to the point of circuit level functional failure. Failure analysis techniques include circuit analysis, board level troubleshooting to identify the degraded components. Intermittent failures require power cycling, thermal cycling, and long term monitoring to identify the responsible components. Corrective actions for semiconductor wear out at SONGS include enhanced monitoring and proactive change out of identified part types.

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