Localizing IC Defect Using Nanoprobing: A 3D Approach

Author(s):  
Jane Y. Li ◽  
Chuan Zhang ◽  
John Aguada ◽  
Christopher Nemirow ◽  
Howard Marks

Abstract This paper demonstrates a methodology for chip level defect localization that allows complex logic nets to be approached from multiple perspectives during failure analysis of modern flip-chip CMOS IC devices. By combining chip backside deprocessing with site-specific plasma Focused Ion Beam (pFIB) low angle milling, the area of interest in a failure IC device is made accessible from any direction for nanoprobing and Electron Beam Absorbed Current (EBAC) analysis. This methodology allows subtle defects to be more accurately localized and analyzed for thorough root-cause understanding.

Author(s):  
H.J. Ryu ◽  
A.B. Shah ◽  
Y. Wang ◽  
W.-H. Chuang ◽  
T. Tong

Abstract When failure analysis is performed on a circuit composed of FinFETs, the degree of defect isolation, in some cases, requires isolation to the fin level inside the problematic FinFET for complete understanding of root cause. This work shows successful application of electron beam alteration of current flow combined with nanoprobing for precise isolation of a defect down to fin level. To understand the mechanism of the leakage, transmission electron microscopy (TEM) slice was made along the leaky drain contact (perpendicular to fin direction) by focused ion beam thinning and lift-out. TEM image shows contact and fin. Stacking fault was found in the body of the silicon fin highlighted by the technique described in this paper.


1997 ◽  
Vol 480 ◽  
Author(s):  
L. A. Giannuzzi ◽  
J. L. Drown ◽  
S. R. Brown ◽  
R. B. Irwin ◽  
F. A. Stevie

AbstractA site specific technique for cross-section transmission electron microscopy specimen preparation of difficult materials is presented. Focused ion beams are used to slice an electron transparent sliver of the specimen from a specific area of interest. Micromanipulation lift-out procedures are then used to transport the electron transparent specimen to a carbon coated copper grid for subsequent TEM analysis. The experimental procedures are described in detail and an example of the lift-out technique is presented.


Author(s):  
C.C. Ooi ◽  
K.H. Siek ◽  
K.S. Sim

Abstract Focused ion beam system has been widely used as a critical failure analysis tool as microprocessor technology advances at a ramping speed. It has become an essential step in failure analysis to reveal physical defects post electrical fault isolation. In this highly competitive and challenging environment prevalent today, failure analysis throughput time is of utmost important. Therefore quick, efficient and reliable physical failure analysis technique is needed to avoid potential issues from becoming bigger. This paper will discuss the applications of FIB as a defect localization and root cause determination tool through the passive charge contrast technique and pattern FIB analysis.


Author(s):  
Raymond Lee ◽  
Nicholas Antoniou

Abstract The increasing use of flip-chip packaging is challenging the ability of conventional Focused Ion Beam (FIB) systems to perform even the most basic device modification and debug work. The inability to access the front side of the circuit has severely reduced the usefulness of tradhional micro-surgery. Advancements in FIB technology and its application now allow access to the circuitry from the backside through the bulk silicon. In order to overcome the problem of imaging through thick silicon, a microscope with Infra Red (IR) capability has been integrated into the FIB system. Navigation can now be achieved using the IR microscope in conjunction with CAD. The integration of a laser interferometer stage enables blind navigation and milling with sub-micron accuracy. To optimize the process, some sample preparation is recommended. Thinning the sample to a thickness of about 100 µm to 200 µm is ideal. Once the sample is thinned, it is then dated in the FIB and the area of interest is identified using the IR microscope. A large hole is milled using the FIB to remove most of the silicon covering the area of interest. At this point the application is very similar to more traditional FIB usage since there is a small amount of silicon to be removed in order to expose a node, cut it or reconnect it. The main differences from front-side applications are that the material being milled is conductive silicon (instead of dielectric) and its feature-less and therefore invisible to a scanned ion beam. In this paper we discuss in detail the method of back-side micro-surgery and its eflkcton device performance. Failure Analysis (FA) is another area that has been severely limited by flip-chip packaging. Localized thinning of the bulk silicon using FIB technology oflkrs access to diagnosing fdures in flip-chip assembled parts.


2005 ◽  
Vol 13 (2) ◽  
pp. 26-29
Author(s):  
Jim Conner ◽  
James Beck ◽  
Bryan Tracy

Since the publication of the use of a dicing saw for TEM sample preparation, several analytical labs have adopted this method as standard practice for site-specific cross section and plan view samples. In this article, we would like to provide additional practical details of these procedures, and describe several extensions, including useful notes on batch processing, preparing samples with an area of interest very close to the sample edge, and a Focused Ion Beam (FIB)-compatible sample holder. We present an unusual amount of detail in these processes to show some of the evolution of the method since its introduction and to allow others to easily reproduce these results.


2009 ◽  
Vol 15 (6) ◽  
pp. 558-563 ◽  
Author(s):  
Herman Carlo Floresca ◽  
Jangbae Jeon ◽  
Jinguo G. Wang ◽  
Moon J. Kim

AbstractWe have developed the focused ion beam (FIB) fold-out technique, for transmission electron microscopy (TEM) sample preparation in which there is no fine polishing or dimpling, thus saving turnaround time. It does not require a nanomanipulator yet is still site specific. The sample wafer is cut to shape, polished down, and then placed in a FIB system. A tab containing the area of interest is created by ion milling and then “folded out” from the bulk sample. This method also allows a plan-view of the sample by removing material below the wafer's surface film or device near the polished edge. In the final step, the sample is thinned to electron transparency, ready to be analyzed in the TEM. With both a cross section and plan-view, our technique gives microscopists a powerful tool in analyzing multiple zone axes in one TEM session. The nature of the polished sample edge also includes the ability to sample many areas, allowing the user to examine a very large device or sample. More importantly, this technique could make multiple site-specific e-beam transparent specimens in one polished sample, which is difficult to do when prepared by other methods.


Author(s):  
Jian-Shing Luo ◽  
Hsiu Ting Lee

Abstract Several methods are used to invert samples 180 deg in a dual beam focused ion beam (FIB) system for backside milling by a specific in-situ lift out system or stages. However, most of those methods occupied too much time on FIB systems or requires a specific in-situ lift out system. This paper provides a novel transmission electron microscopy (TEM) sample preparation method to eliminate the curtain effect completely by a combination of backside milling and sample dicing with low cost and less FIB time. The procedures of the TEM pre-thinned sample preparation method using a combination of sample dicing and backside milling are described step by step. From the analysis results, the method has applied successfully to eliminate the curtain effect of dual beam FIB TEM samples for both random and site specific addresses.


Author(s):  
Chuan Zhang ◽  
Jane Y. Li ◽  
John Aguada ◽  
Howard Marks

Abstract This paper introduces a novel sample preparation method using plasma focused ion-beam (pFIB) milling at low grazing angle. Efficient and high precision preparation of site-specific cross-sectional samples with minimal alternation of device parameters can be achieved with this method. It offers the capability of acquiring a range of electrical characteristic signals from specific sites on the cross-section of devices, including imaging of junctions, Fins in the FinFETs and electrical probing of interconnect metal traces.


Author(s):  
Roger Alvis ◽  
Jeff Blackwood ◽  
Sang-Hoon Lee ◽  
Matthew Bray

Abstract Semiconductor devices with critical dimensions less than 20nm are now being manufactured in volume. A challenge facing the failure analysis and process-monitoring community is two-fold. The first challenge of TEM sample prep of such small devices is that the basic need to end-point on a feature-of-interest pushes the imaging limit of the instrument being used to prepare the lamella. The second challenge posed by advanced devices is to prepare an artifact-free lamella from non-planar devices such as finFETs as well as from structures incorporating ‘non-traditional’ materials. These challenges are presently overcome in many advanced logic and memory devices in the focused ion beam-based TEM sample preparation processes by inverting the specimen prior to thinning to electron transparency. This paper reports a highthroughput method for the routine preparation of artifact-free TEM lamella of 20nm thickness, or less.


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