High-Throughput, Site-Specific Sample Prep of Ultra-Thin TEM Lamella for Process Metrology and Failure Analysis

Abstract Semiconductor devices with critical dimensions less than 20nm are now being manufactured in volume. A challenge facing the failure analysis and process-monitoring community is two-fold. The first challenge of TEM sample prep of such small devices is that the basic need to end-point on a feature-of-interest pushes the imaging limit of the instrument being used to prepare the lamella. The second challenge posed by advanced devices is to prepare an artifact-free lamella from non-planar devices such as finFETs as well as from structures incorporating ‘non-traditional’ materials. These challenges are presently overcome in many advanced logic and memory devices in the focused ion beam-based TEM sample preparation processes by inverting the specimen prior to thinning to electron transparency. This paper reports a highthroughput method for the routine preparation of artifact-free TEM lamella of 20nm thickness, or less.

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To Eliminate Curtain Effect of FIB TEM Samples by a Combination of Sample Dicing and Backside Milling

ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2014p0400 ◽

2014 ◽

Author(s):

Jian-Shing Luo ◽

Hsiu Ting Lee

Keyword(s):

Sample Preparation ◽

Focused Ion Beam ◽

Preparation Method ◽

Low Cost ◽

Ion Beam ◽

Sample Preparation Method ◽

Site Specific ◽

Dual Beam ◽

Transmission Electron

Abstract Several methods are used to invert samples 180 deg in a dual beam focused ion beam (FIB) system for backside milling by a specific in-situ lift out system or stages. However, most of those methods occupied too much time on FIB systems or requires a specific in-situ lift out system. This paper provides a novel transmission electron microscopy (TEM) sample preparation method to eliminate the curtain effect completely by a combination of backside milling and sample dicing with low cost and less FIB time. The procedures of the TEM pre-thinned sample preparation method using a combination of sample dicing and backside milling are described step by step. From the analysis results, the method has applied successfully to eliminate the curtain effect of dual beam FIB TEM samples for both random and site specific addresses.

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Solving the Voltage Contrast on Floating Substrate with Standard FA Toolset

ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2016p0229 ◽

2016 ◽

Author(s):

Julien Goxe ◽

Béatrice Vanhuffel ◽

Marie Castignolles ◽

Thomas Zirilli

Keyword(s):

Electron Microscope ◽

Scanning Electron Microscope ◽

Sample Preparation ◽

Failure Analysis ◽

Focused Ion Beam ◽

Ion Beam ◽

Silicon On Insulator ◽

Mixed Signal ◽

Voltage Contrast ◽

Scanning Electron

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.

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Failure Analysis Strategies for Multistacked Memory Devices with TSV Interconnects

ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2015p0135 ◽

2015 ◽

Author(s):

Frank Altmann ◽

Christian Grosse ◽

Falk Naumann ◽

Jens Beyersdorfer ◽

Tony Veches

Keyword(s):

Failure Analysis ◽

Focused Ion Beam ◽

Failure Modes ◽

Ion Beam ◽

Memory Devices ◽

Metallographic Cross Section ◽

Electron Beam Induced Current ◽

Thermal Simulations ◽

Lock In ◽

Non Destructive

Abstract In this paper we will demonstrate new approaches for failure analysis of memory devices with multiple stacked dies and TSV interconnects. Therefore, TSV specific failure modes are studied on daisy chain test samples. Two analysis flows for defect localization implementing Electron Beam Induced Current (EBAC) imaging and Lock-in-Thermography (LIT) as well as adapted Focused Ion Beam (FIB) preparation and defect characterization by electron microscopy will be discussed. The most challenging failure mode is an electrical short at the TSV sidewall isolation with sub-micrometer dimensions. It is shown that the leakage path to a certain TSV within the stack can firstly be located by applying LIT to a metallographic cross section and secondly pinpointing by FIB/SEM cross-sectioning. In order to evaluate the potential of non-destructive determination of the lateral defect position, as well as the defect depth from only one LIT measurement, 2D thermal simulations of TSV stacks with artificial leakages are performed calculating the phase shift values per die level.

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Alternative FIB TEM Sample Preparation Method for Cross-Sections of Thin Metal Films Deposited on Polymer Substrates

Microscopy and Microanalysis ◽

10.1017/s1431927613001670 ◽

2013 ◽

Vol 19 (4) ◽

pp. 1080-1091 ◽

Cited By ~ 4

Author(s):

Felipe Rivera ◽

Robert Davis ◽

Richard Vanfleet

Keyword(s):

Sample Preparation ◽

Cross Sections ◽

Elemental Analysis ◽

Focused Ion Beam ◽

Preparation Method ◽

Ion Beam ◽

Sample Preparation Method ◽

Site Specific ◽

Polymer Substrates ◽

Interface Layers

AbstractTransmission electron microscopy (TEM) and focused ion beam (FIB) are proven tools to produce site-specific samples in which to study devices from initial processing to causes for failure, as well as investigating the quality, defects, interface layers, etc. However, the use of polymer substrates presents new challenges, in the preparation of suitable site-specific TEM samples, which include sample warping, heating, charging, and melting. In addition to current options that address some of these problems such as cryo FIB, we add an alternative method and FIB sample geometry that address these challenges and produce viable samples suitable for TEM elemental analysis. The key feature to this approach is a larger than usual lift-out block into which small viewing windows are thinned. Significant largely unthinned regions of the block are left between and at the base of the thinned windows. These large unthinned regions supply structural support and thermal reservoirs during the thinning process. As proof-of-concept of this sample preparation method, we also present TEM elemental analysis of various thin metallic films deposited on patterned polycarbonate, lacquer, and poly-di-methyl-siloxane substrates where the pattern (from low- to high-aspect ratio) is preserved.

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Cutting-Edge Sample Preparation from FIB to Ar Concentrated Ion Beam Milling of Advanced Semiconductor Devices

ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2020p0133 ◽

2020 ◽

Author(s):

C.S. Bonifacio ◽

P. Nowakowski ◽

R. Li ◽

M.L. Ray ◽

P.E. Fischione ◽

...

Keyword(s):

Sample Preparation ◽

Failure Analysis ◽

Focused Ion Beam ◽

Ion Beam ◽

Semiconductor Devices ◽

Specific Area ◽

Cutting Edge ◽

Preparation Technique ◽

Ion Milling ◽

Sample Preparation Technique

Abstract Fast and accurate examination from the bulk to the specific area of the defect in advanced semiconductor devices is critical in failure analysis. This work presents the use of Ar ion milling methods in combination with Ga focused ion beam (FIB) milling as a cutting-edge sample preparation technique from the bulk to specific areas by FIB lift-out without sample-preparation-induced artifacts. The result is an accurately delayered sample from which electron-transparent TEM specimens of less than 15 nm are obtained.

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Automated Sample Depth Targeting with Low kV Cleaning by Focused Ion Beam Microscopy for Atom Probe Tomography

ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2020p0299 ◽

2020 ◽

Author(s):

Woo Jun Kwon ◽

Jisu Ryu ◽

Christopher H. Kang ◽

Michael B. Schmidt ◽

Nicholas Croy

Keyword(s):

Sample Preparation ◽

Atom Probe Tomography ◽

Focused Ion Beam ◽

Ion Beam ◽

Region Of Interest ◽

Atom Probe ◽

Sample Volume ◽

Cleaning Process ◽

Site Specific ◽

Sample Depth

Abstract Focused ion beam (FIB) microscopy is an essential technique for the site-specific sample preparation of atom probe tomography (APT). The site specific APT and automated APT sample preparation by FIB have allowed increased APT sample volume. In the workflow of APT sampling, it is very critical to control depth of the sample where exact region of interest (ROI) for accurate APT analysis. Very precise depth control is required at low kV cleaning process in order to remove the damaged layer by previous high kV FIB process steps. We found low kV cleaning process with 5 kV and followed by 2kV beam conditions delivers better control to reached exact ROI on Z direction. This understanding is key to make APT sample with fully automated fashion.

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Comparison of Precision XTEM Specimen Preparation Techniques for Semiconductor Failure Analysis

Microscopy and Microanalysis ◽

10.1017/s1431927600008679 ◽

1997 ◽

Vol 3 (S2) ◽

pp. 357-358

Author(s):

C. Amy Hunt

Keyword(s):

Sample Preparation ◽

Failure Analysis ◽

Focused Ion Beam ◽

Ion Beam ◽

Mechanical Polishing ◽

Specimen Preparation ◽

Ion Milling ◽

Tem Analysis ◽

The Past ◽

Preparation Techniques

The demand for TEM analysis in semiconductor failure analysis is rising sharply due to the shrinking size of devices. A well-prepared sample is a necessity for getting meaningful results. In the past decades, a significant amount of effort has been invested in improving sample preparation techniques for TEM specimens, especially precision cross-sectioning techniques. The most common methods of preparation are mechanical dimpling & ion milling, focused ion beam milling (FIBXTEM), and wedge mechanical polishing. Each precision XTEM technique has important advantages and limitations that must be considered for each sample.The concept for both dimpling & ion milling and wedge specimen preparation techniques is similar. Both techniques utilize mechanical polishing to remove the majority of the unwanted material, followed by ion milling to assist in final polishing or cleaning. Dimpling & ion milling produces the highest quality samples and is a relatively easy technique to master.

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Specific Area Planar and Cross-Sectional Lift-Out Techniques: Procedures and Novel Applications

ISTFA 2000: Conference Proceedings from the 26th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2000p0415 ◽

2000 ◽

Author(s):

Raghaw S. Rai ◽

Swaminathan Subramanian ◽

Stewart Rose ◽

James Conner ◽

Phil Schani ◽

...

Keyword(s):

Sample Preparation ◽

Failure Analysis ◽

Integrated Circuit ◽

Ion Beam ◽

Specific Area ◽

Cross Sectional ◽

Site Specific ◽

Focussed Ion Beam ◽

Lattice Images ◽

Novel Applications

Abstract Conventional focussed ion beam (FIB) based specific area transmission electron microscopy (TEM) sample preparation techniques usually requires complex grinding and gluing steps before final FIB thinning of the sample to electron transparency (<0.25 μm). A novel technique known as lift-out, plucking or pullout method that eliminates all the pre-FIB sample preparation has been developed for specific area TEM sample preparation by several authors. The advantages of the lift-out procedure include reduced sample preparation time and possibility of specific area TEM sample preparation of most components of integrated circuit with almost no geometric or dimensional limitations. In this paper, details of liftout method, developed during the present work, for site specific x-sectional and a new site specific planar sample preparation are described. Various methodologies are discussed to maximize the success rate by optimizing the factors that affect the technique. In failure analysis, the geometric and dimensional flexibility offered by the lift-out technique can be used to prepare specific area TEM sample of back thinned die, small particles and packaged parts. Such novel applications of lift-out technique in failure analysis are discussed with the examples of TEM results obtained from GaAs and Si based devices. Importantly, it was possible to obtain high resolution lattice images from the lift-out samples transferred on holey carbon supported 3mm copper grids.

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Silicon and Package Preparation Options for Focused Ion Beam (FIB) Circuit Editing and General Packaging Failure Analysis

ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2013p0123 ◽

2013 ◽

Author(s):

Steven B. Herschbein ◽

Carmelo F. Scrudato ◽

George K. Worth ◽

Edward S. Hermann

Keyword(s):

Sample Preparation ◽

Failure Analysis ◽

Focused Ion Beam ◽

Solder Bump ◽

Ion Beam ◽

Full Thickness ◽

Wire Bond ◽

Signal Probe ◽

Silicon Vias ◽

Semiconductor Packaging

Abstract The Focused Ion Beam (FIB) technique of internal modification for chip repair, layout verification, and internal signal probe access has become an integral part of the process for bringing advanced products to market. The pervasive switch from wire bond connections to single component flipchip solder bump mounting on high value products has greatly aided the task of FIB editing by placing the bare backside silicon of the die within easy reach. FIB chip circuit access begins with task-specific sample preparation. The package opening and silicon prep process is well defined and quite robust when full thickness chips are mounted to simple ceramic carriers. Unfortunately, the introduction of flexible organic laminate substrates and the development of stacked die packaging has further complicated the process. Multi-chip packages containing combinations of full thickness and thinned chips may be present. They could be wire-bond connected, or use Through-Silicon Vias (TSV) for double sided attachment. Multiple heat treatment cycles joining together materials with vastly different coefficients of thermal expansion (CTE) may result in severe package warpage and stress. All of these conditions and possible combinations have served to invalidate key elements of the established sample preparation process, and made each presented case unique. As the FIB team works to develop new precision techniques for internal circuitry access, the greater semiconductor packaging development and failure analysis community has benefited from the introduction of new tooling and methodologies.

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