scholarly journals Tailoring Morphology and Vertical Yield of Self-Catalyzed GaP Nanowires on Template-Free Si Substrates

Nanomaterials ◽  
2021 ◽  
Vol 11 (8) ◽  
pp. 1949
Author(s):  
Vladimir V. Fedorov ◽  
Yury Berdnikov ◽  
Nickolay V. Sibirev ◽  
Alexey D. Bolshakov ◽  
Sergey V. Fedina ◽  
...  
Keyword(s):  
Gallium Phosphide ◽  
Silicon Oxide ◽  
Electronic Devices ◽  
High Yield ◽  
Silicon Oxide Layer ◽  
Si Substrates ◽  
Template Free ◽  
And Control ◽  
Vertical Gap ◽  
Comprehensive Study

Tailorable synthesis of III-V semiconductor heterostructures in nanowires (NWs) enables new approaches with respect to designing photonic and electronic devices at the nanoscale. We present a comprehensive study of highly controllable self-catalyzed growth of gallium phosphide (GaP) NWs on template-free silicon (111) substrates by molecular beam epitaxy. We report the approach to form the silicon oxide layer, which reproducibly provides a high yield of vertical GaP NWs and control over the NW surface density without a pre-patterned growth mask. Above that, we present the strategy for controlling both GaP NW length and diameter independently in single- or two-staged self-catalyzed growth. The proposed approach can be extended to other III-V NWs.

Interfacial Structure and Electrical Characteristics of LaNiO3/Si Contacts

2002 ◽  
Vol 17 (6) ◽  
pp. 1350-1355 ◽  
Author(s):  
Tai-Bor Wu ◽  
Chin-Lin Liu ◽  
Yu-Wen Liu
Keyword(s):  
Oxide Layer ◽  
Barrier Height ◽  
Silicon Oxide ◽  
Ion Beam ◽  
Linear Part ◽  
Rf Magnetron Sputtering ◽  
Interfacial Structure ◽  
Silicon Oxide Layer ◽  
Si Substrates ◽  
Clean Interface

The LaNiO3 (LNO) thin films were deposited on Si substrate by rf magnetron sputtering. The interface and electrical properties of LNO/Si contacts were investigated. For the deposition at room temperature, an amorphous LNO film with a clean interface was formed on the Si. However, a thin silicon oxide layer of approximately 2.5 nm was formed at the interface between LNO and Si after rapid thermal annealing (RTA) at temperatures ≥450 °C. On the other hand, a highly (100)-textured LNO film along with an interfacial oxide layer of approximately 6.0 nm was obtained for the deposition at 400–450 °C. Nevertheless, if an ion beam etching was applied prior to the high temperature deposition at 400–450 °C, a clean interface at the interface could be obtained for the LNO/Si contacts. Moreover, crystallites with (111) planes grown epitaxially along the (111) planes of Si were found in the LNO films. All the contacts had shown good current–voltage characteristics of a Schottky diode with a barrier height of 0.69–0.78 eV for the LNO/n-Si contacts and 0.60–0.67 eV for the LNO/p-Si contacts, and the barrier height increased with the thickening of interfacial oxide layer. From the measurement of capacitance (C) under reverse bias (Vr) of the contacts made with LNO deposited on the ion-etched Si substrates, a linear relation was observed in the plot of C−2 against Vr except a deviation of linearity in the low-bias part of the curve. This deviation is most likely due to the segregation and inward diffusion of La and Ni near the interface of LNO/Si contacts. Nevertheless, the barrier heights evaluated from an extrapolation of linear part of the plots are reasonably consistent with those obtained from the I–V measurement.

SIMPLE AND CATALYST-FREE SYNTHESIS OF SILICON OXIDE NANOWIRES AND NANOCOILS

NANO ◽  
2007 ◽  
Vol 02 (02) ◽  
pp. 91-95 ◽  
Author(s):  
XINQI CHEN ◽  
RODNEY S. RUOFF
Keyword(s):  
Oxide Layer ◽  
Silicon Oxide ◽  
Ambient Pressure ◽  
Amorphous Structure ◽  
High Yield ◽  
Furnace Temperature ◽  
Simple Method ◽  
Oxide Nanowires ◽  
Si Substrates ◽  
Mechanism Of Growth

In this paper, a simple method for synthesizing SiO x nanowires and nanocoils is presented. Si substrates with an oxide layer were placed in a tube furnace exposed to temperatures ranging from 900°C to 1200°C for a few hours under a mixture of flowing Ar and H2 gas maintained at ambient pressure. Nanowires were grown from the surface when the furnace temperature was above 1000°C and a high yield could be achieved at 1100°C. SiO x nanocoils have also been observed and the sample treated at 1000°C had the highest concentration of them. TEM images show that the nanowires and the nanocoils have an amorphous structure and analysis of EDX spectra (obtained in the TEM) shows that x varies from 1.2 to 2.0. The mechanism of growth is discussed.

scholarly journals Growth of GaP Layers on Si Substrates in a Standard MOVPE Reactor for Multijunction Solar Cells

Coatings ◽  
2021 ◽  
Vol 11 (4) ◽  
pp. 398
Author(s):  
Pablo Caño ◽  
Carmen M. Ruiz ◽  
Amalia Navarro ◽  
Beatriz Galiana ◽  
Iván García ◽  
...  
Keyword(s):  
Solar Cells ◽  
Gallium Phosphide ◽  
Growth Process ◽  
Electrical Characterization ◽  
Substrate Preparation ◽  
Nucleation Layer ◽  
Si Substrates ◽  
Ideal Candidate ◽  
Multijunction Solar Cells ◽  
Multijunction Solar Cell

Gallium phosphide (GaP) is an ideal candidate to implement a III-V nucleation layer on a silicon substrate. The optimization of this nucleation has been pursued for decades, since it can form a virtual substrate to grow monolithically III-V devices. In this work we present a GaP nucleation approach using a standard MOVPE reactor with regular precursors. This design simplifies the epitaxial growth in comparison to other routines reported, making the manufacturing process converge to an industrial scale. In short, our approach intends to mimic what is done to grow multijunction solar cells on Ge by MOVPE, namely, to develop a growth process that uses a single reactor to manufacture the complete III-V structure, at common MOVPE process temperatures, using conventional precursors. Here, we present the different steps in such GaP nucleation routine, which include the substrate preparation, the nucleation itself and the creation of a p-n junction for a Si bottom cell. The morphological and structural measurements have been made with AFM, SEM, TEM and Raman spectroscopy. These results show a promising surface for subsequent III-V growth with limited roughness and high crystallographic quality. For its part, the electrical characterization reveals that the routine has also formed a p-n junction that can serve as bottom subcell for the multijunction solar cell.

Effect of wet-chemical substrate smoothing on passivation of ultrathin-SiO2/n-Si(111) interfaces prepared with atomic oxygen at thermal impact energies

Open Physics ◽  
2011 ◽  
Vol 9 (6) ◽  
Author(s):  
Heike Angermann ◽  
Orman Gref ◽  
Bert Stegemann
Keyword(s):  
Atomic Oxygen ◽  
Silicon Oxide ◽  
Visible Region ◽  
Atomic Scale ◽  
Favourable Effect ◽  
Silicon Oxide Layer ◽  
Potential Applications ◽  
Wet Chemical ◽  
Pre Treatment ◽  
Impact Energies

AbstractUltrathin SiO2 layers for potential applications in nano-scale electronic and photovoltaic devises were prepared by exposure to thermalized atomic oxygen under UHV conditions. Wet-chemical substrate pretreatment, layer deposition and annealing processes were applied to improve the electronic Si/SiO2 interface properties. This favourable effect of optimized wet-chemical pre-treatment can be preserved during the subsequent oxidation. The corresponding atomic-scale analysis of the electronic interface states after substrate pre-treatment and the subsequent silicon oxide layer formation is performed by field-modulated surface photovoltage (SPV), atomic force microscopy (AFM) and spectroscopic ellipsometry in the ultraviolet and visible region (UV-VIS-SE).

ANALYSIS OF ECONOMIC AND ENVIRONMENTAL LOSSES CAUSED BY ELECTROMAGNETIC COMPATIBILITY ISSUES

2020 ◽  
Author(s):  
V.G. Shifrin ◽  
◽  
N.V. Limarenko ◽  
D.V. Trinz ◽  
D.S. Inozemtsev ◽  
...  
Keyword(s):  
Environmental Impact ◽  
Electromagnetic Compatibility ◽  
Electronic Devices ◽  
Economic Losses ◽  
Negative Consequences ◽  
Negative Environmental Impact ◽  
And Control

This article discusses the problems of the influence of electromagnetic compatibility (EMC) violations of electrical and electronic devices on the surrounding ecosystems. The analysis is carried out and the classification of EMC violations is given, the causes of the compatibility violation are examined, and the economic losses and the negative environmental impact, as a consequence of the considered violations, are analyzed. A classification and generalization of methods to minimize the negative consequences of EMC violations was carried out, criteria for reducing economic losses were considered, methods for preventing and preventing EMC violations of various power and electronic devices were classified. The methods of monitoring the compatibility of devices are considered and recommendations are given for observing the necessary safety and control requirements.

scholarly journals Prototipe Perangkat untuk Pemantauan dan Pengendalian Berbasis Web Diiintegrasikan ke Smarthome System

2020 ◽  
Vol 10 (2) ◽  
pp. 167
Author(s):  
Achmad Faris Nasyarudin ◽  
Ritzkal Ritzkal ◽  
Arief Goeritno
Keyword(s):  
Performance Measurement ◽  
Water Level ◽  
Measurement System ◽  
Electronic Devices ◽  
Water Tank ◽  
Monitoring And Control ◽  
Validation Test ◽  
Level Measurement ◽  
And Performance ◽  
And Control

 The design and construction of a device prototype for a water level measurement system in a tank and controlling a number of garden light analogies has been carried-out and the prototype can be integrated into smarthome system. Three topics are discussed in this paper, including the manufacture, programming, and performance measurement of device prototypes. The formation of prototype of the device is done through wiring integration between electronic devices, in order to obtain the hardware handshacking. Programming the prototype of device is done through the creation of algorithms and preparation of syntax, in order to obtain the software handshacking. The performance of the prototype of device is measured when integrated into the Smarthome system, in order to obtain the hardware and software handshacking. The performance of prototype of the device when monitoring in the form of information about the water level in the water tank with 3 (three) conditions, namely the criteria of "empty", "medium", and "full", while the control in the form of information about the operation of ON/OFF of the LED as an analogy to the lamp garden are done for 3 (three) positions, namely position #1, #2, and #3. The manufactured subsystem prototype can be integrated into the smarthome system when a validation test is performed. Prototype of the device for monitoring and control based-on web that can be integrated into the smarthome system.

Using Interactive Digital Television Middleware Tools to Promote Facilities for Healthcare and Social Services

2013 ◽  
pp. 1005-1021
Author(s):  
Samuel Oliveira Azevedo ◽  
Rummenigge Rudson Dantas ◽  
Luiz Marcos Gonçalves
Keyword(s):  
Social Services ◽  
Electronic Devices ◽  
Digital Television ◽  
Research Directions ◽  
Personal Needs ◽  
Interactive Digital Television ◽  
And Control ◽  
Use Of Internet

This chapter introduces the use of middleware tools in applications for healthcare and social services, focusing on solutions designed for Interactive Digital Television (IDTV), and discusses its implications to modern roles for easing patient and caretaker relations. The authors explore the capacities of such solutions to assist the patients in their personal needs, optimizing the time and tasks of the caretaker. They discuss the limits of the use of Internet in satisfying the needs of communication of elderly and other patients, and then they propose new roles for caretaking based on this new reality. The authors also present an architecture that allows the remote use and control of electronic devices via IDTV set-top boxes for the middleware Ginga. They show applications based on this architecture that promote healthcare and social services, as a set of infrared lights coupled to a hat that can be used as input for impaired patients, and how an accelerometer can be used with IDTV applications for treatment and entertainment. Before concluding, the authors point out research directions on the topics discussed in this chapter.

The Recrystallization Depth Control of the Excimer-Laser-Recrystallized Poly-Crystalline Silicon Film

1999 ◽  
Vol 557 ◽  
Author(s):  
Kee-Chan Park ◽  
Kwon-Young Choi ◽  
Jae-Hong Jeon ◽  
Min-Cheol Lee ◽  
Min-Koo Han
Keyword(s):  
Laser Beam ◽  
Excimer Laser ◽  
Laser Annealing ◽  
Silicon Oxide ◽  
Crystalline Silicon ◽  
Silicon Film ◽  
Film Structure ◽  
Excimer Laser Annealing ◽  
Silicon Oxide Layer ◽  
Thin Oxide Film

AbstractA novel method to control the recrystallization depth of amorphous silicon (a-Si) film during the excimer laser annealing (ELA) is proposed in order to preserve a-Si that is useful for fabrication of poly-Si TFT with a-Si offset in the channel. A XeCl excimer laser beam is irradiated on a triple film structure of a-Si thin native silicon oxide (~20Å)/thick a-Si layer. Only the upper a-Si film is recrystallized by the laser beam irradiation, whereas the lower thick a-Si film remains amorphous because the thin native silicon oxide layer stops the grain growth of the poly-crystalline silicon (poly-Si). So that the thin oxide film sharply divides the upper poly-Si from the lower a-Si.

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