TCAD simulation for capture / emission of carriers by traps in SiN: trap-assisted tunneling model extended for capture of carriers injected via Fowler-Nordheim tunneling

2021 ◽  
Author(s):  
Michiru Hogyoku ◽  
Yoshinori Yokota ◽  
Kazuhito Nishitani
Keyword(s):  
Computer Aided Design ◽  
Capture Efficiency ◽  
Oxide Semiconductor ◽  
Additional Time ◽  
Charge Trap ◽  
Trap Assisted Tunneling ◽  
Assisted Tunneling ◽  
Tcad Simulation ◽  
Incremental Step ◽  
Nordheim Tunneling

Abstract We propose the novel trap-assisted tunneling (TAT) model that incorporates the ability to calculate dissipation of the kinetic energy of carriers propagating in the conduction or valence band. The proposed model allows us to evaluate capture efficiency (or the capture cross section) of carriers injected into the SiN charge trap layer via Fowler-Nordheim tunneling. By applying our TAT model to large planar Metal-Oxide-Nitride-Oxide-Semiconductor (MONOS) capacitors, experimental data showing that electron capture efficiency depends on the tunnel oxide thickness are physically interpreted. Furthermore, 3-dimensional technology computer-aided design (TCAD) simulation using SiN trap parameters roughly extracted from planar MONOS data shows that the calculated incremental step pulse programming characteristics of the charge trap memory (CTM) prototype device are comparable with measured data. We have found that additional time to calculate SiN trap charges is less than only 5 % of all remaining calculation time.

scholarly journals Compact Trap-Assisted-Tunneling Model for Line Tunneling Field-Effect-Transistor Devices

2020 ◽  
Vol 10 (13) ◽  
pp. 4475
Author(s):  
Faraz Najam ◽  
Yun Seop Yu
Keyword(s):  
Experimental Data ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Potential Profile ◽  
Relaxation Energy ◽  
Tunneling Model ◽  
Compact Formulation ◽  
Trap Assisted Tunneling ◽  
Assisted Tunneling

Trap-assisted-tunneling (TAT) is a well-documented source of severe subthreshold degradation in tunneling field-effect-transistors (TFET). However, the literature lacks in numerical or compact TAT models applied to TFET devices. This work presents a compact formulation of the Schenk TAT model that is used to fit experimental drain-source current (Ids) versus gate-source voltage (Vgs) data of an L-shaped and line tunneling type TFET. The Schenk model incorporates material-dependent fundamental physical constants that play an important role in influencing the TAT generation (GTAT) including the lattice relaxation energy, Huang–Rhys factor, and the electro-optical frequency. This makes fitting any experimental data using the Schenk model physically relevant. The compact formulation of the Schenk TAT model involved solving the potential profile in the TFET and using that potential profile to calculate GTAT using the standard Schenk model. The GTAT was then approximated by the Gaussian distribution function for compact implementation. The model was compared against technology computer-aided design (TCAD) results and was found in reasonable agreement. The model was also used to fit an experimental device’s Ids–Vgs characteristics. The results, while not exactly fitting the experimental data, follow the general experimental Ids–Vgs trend reasonably well; the subthreshold slope was loosely similar to the experimental device. Additionally, the ON-current, especially to make a high drain-source bias model accurate, can be further improved by including effects such as electrostatic degradation and series resistance.

Analysis of Channel Area Fluctuation Effects of Gate-All-Around Tunnel Field-Effect Transistor

2020 ◽  
Vol 20 (7) ◽  
pp. 4409-4413
Author(s):  
Seok Jung Kang ◽  
Jeong-Uk Park ◽  
Kyung Jin Rim ◽  
Yoon Kim ◽  
Jang Hyun Kim ◽  
...  
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Oxide Semiconductor ◽  
Fluctuation Effects ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Tcad Simulation ◽  
Aided Design ◽  
First Time

In this manuscript, channel area fluctuation (CAF) effects on turn-on voltage (Von) and subthreshold swing (SS) in gate-all-around (GAA) nanowire (NW) tunnel field-effect transistor (TFET) with multi-bridge-channel (MBC) have been investigated for the first time. These variations occur because oblique etching slope makes various elliptical-shaped channels in MBC-TFET. Since TFET is promising candidates to succeed metal-oxide-semiconductor FETs (MOSFET), these variation effects have been compared to MOSFET. Furthermore, Ge homojunction TFET, one of the solutions to increase on-state current in TFET and improve SS also has been simulated using technology computer-aided design (TCAD) simulation. The results would be worth reference for future study about GAA NW TFETs.

scholarly journals Analysis of Electrical Characteristics in 4H-SiC Trench-Gate MOSFETs with Grounded Bottom Protection p-Well Using Analytical Modeling

2021 ◽  
Vol 11 (24) ◽  
pp. 12075
Author(s):  
Jee-Hun Jeong ◽  
Ogyun Seok ◽  
Ho-Jun Lee
Keyword(s):  
Analytical Model ◽  
Computer Aided Design ◽  
Analytical Modeling ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Electrical Characteristics ◽  
Reverse Transfer ◽  
Tcad Simulation ◽  
Switching Characteristics ◽  
Aided Design

A new analytical model to analyze and optimize the electrical characteristics of 4H-SiC trench-gate metal-oxide-semiconductor field-effect transistors (TMOSFETs) with a grounded bottom protection p-well (BPW) was proposed. The optimal BPW doping concentration (NBPW) was extracted by analytical modeling and a numerical technology computer-aided design (TCAD) simulation, in order to analyze the breakdown mechanisms for SiC TMOSFETs using BPW, while considering the electric field distribution at the edge of the trench gate. Our results showed that the optimal NBPW obtained by analytical modeling was almost identical to the simulation results. In addition, the reverse transfer capacitance (Cgd) values obtained from the analytical model correspond with the results of the TCAD simulation by approximately 86%; therefore, this model can predict the switching characteristics of the effect BPW regions.

Effect of SiN on Performance and Reliability of Charge Trap Flash (CTF) Under Fowler–Nordheim Tunneling Program/Erase Operation

2009 ◽  
Vol 30 (2) ◽  
pp. 171-173 ◽  
Author(s):  
C. Sandhya ◽  
U. Ganguly ◽  
N. Chattar ◽  
C. Olsen ◽  
S.M. Seutter ◽  
...  
Keyword(s):  
Charge Trap ◽  
Nordheim Tunneling

APPLICATION OF EPITAXIAL UNIPOLAR BARRIERS TO REDUCE NOISE CURRENTS IN PHOTODETECTORS

2011 ◽  
Vol 20 (03) ◽  
pp. 557-564
Author(s):  
G. R. SAVICH ◽  
J. R. PEDRAZZANI ◽  
S. MAIMON ◽  
G. W. WICKS
Keyword(s):  
Leakage Current ◽  
Surface Passivation ◽  
Leakage Currents ◽  
Type Region ◽  
Surface Leakage Current ◽  
Unipolar Barrier ◽  
Trap Assisted Tunneling ◽  
Assisted Tunneling ◽  
Tunneling Currents ◽  
Surface Leakage

Tunneling currents and surface leakage currents are both contributors to the overall dark current which limits many semiconductor devices. Surface leakage current is generally controlled by applying a post-epitaxial passivation layer; however, surface passivation is often expensive and ineffective. Band-to-band and trap assisted tunneling currents cannot be controlled through surface passivants, thus an alternative means of control is necessary. Unipolar barriers, when appropriately applied to standard electronic device structures, can reduce the effects of both surface leakage and tunneling currents more easily and cost effectively than other methods, including surface passivation. Unipolar barriers are applied to the p -type region of a conventional, MBE grown, InAs based pn junction structures resulting in a reduction of surface leakage current. Placing the unipolar barrier in the n -type region of the device, has the added benefit of reducing trap assisted tunneling current as well as surface leakage currents. Conventional, InAs pn junctions are shown to exhibit surface leakage current while unipolar barrier photodiodes show no detectable surface currents.

scholarly journals Fowler-Nordheim tunneling at SiO2/4H-SiC interfaces in metal-oxide-semiconductor field effect transistors

2014 ◽  
Vol 105 (14) ◽  
pp. 142108 ◽  
Author(s):  
Patrick Fiorenza ◽  
Alessia Frazzetto ◽  
Alfio Guarnera ◽  
Mario Saggio ◽  
Fabrizio Roccaforte
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Nordheim Tunneling

Trap-Assisted Tunneling in MIS and Schottky Structures

1983 ◽  
Vol 79 (1) ◽  
pp. 223-236 ◽  
Author(s):  
F. Campabadal ◽  
V. Milian ◽  
X. Aymerich-Humet
Keyword(s):  
Trap Assisted Tunneling ◽  
Assisted Tunneling
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