Simulation, Fabrication and Characterization of 4500V 4H-SiC Normally-Off VJFET
2013 ◽
Vol 347-350
◽
pp. 1641-1645
Keyword(s):
Simulation, Fabrication and characteristics of high voltage, normally-off JFETs in 4H-SiC are presented. The devices were built on ND= 1.01015 cm-3 doped 50μm thick n-type epilayer grown on a n+ 4H-SiC. Parameters of edge termination have been optimized by simulations. Its blocking voltage exceeds 4500V at gate bias VG = -6V and forward drain current is in excess of 3A at gate bias VG = 3V and drain bias VD = 5V corresponding a current density of 80A/cm2.
2012 ◽
Vol 229-231
◽
pp. 824-827
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Keyword(s):
2005 ◽
Vol 251
(1-4)
◽
pp. 249-253
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Keyword(s):
2012 ◽
Vol 211
◽
pp. 108-118
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2006 ◽
Vol 527-529
◽
pp. 1449-1452
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Keyword(s):
2013 ◽
Vol 347-350
◽
pp. 1506-1509
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Keyword(s):
2014 ◽
Vol 778-780
◽
pp. 800-803
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2005 ◽
Vol 483-485
◽
pp. 1005-1008
2012 ◽
Vol 717-720
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pp. 1163-1166
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