Performance Analysis Method under Time-Space Variations

2011 ◽  
Vol 186 ◽  
pp. 494-498
Author(s):  
Hu Jing
Keyword(s):  
Performance Analysis ◽  
Integrated Circuit ◽  
Process Variations ◽  
Temporal Variations ◽  
High Order ◽  
Quadratic Model ◽  
Analysis Model ◽  
Circuit Performance ◽  
Time Space ◽  
And Function

With shrinking process size, many variations have a growing impact on circuit performance for today’s integrated circuit(IC) technologies. In this paper, we describe a high-order model of circuit performance analysis under time-space variations. The time-space variations, such as process variations, place and route imformance, environment parameters and temporal variations, are included in hierarachical perfornance analysis. The time-space variations are increased in variance analysis. Based on quadratic model, coefficients of the K-L expansion and function item are decided. The high-order analysis model is built. The result of experiment proves that the proposed method can improve analysis performance effectively.

Statistical Gate-Delay Modeling with Copulas

2020 ◽  
Vol 15 (3) ◽  
pp. 1-10
Author(s):  
Walter Schneider
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
Process Variations ◽  
Deep Submicron ◽  
Experimental Results ◽  
Gate Delay ◽  
Integrated Circuit Design ◽  
Circuit Performance ◽  
Delay Models ◽  
Innovative Concept

The growing impact of process variations on circuit performance has become a major concern for deep-submicron integrated circuit design, resulting in numerous SSTA-algorithms. The acceptance of such algorithms in industry however will be dependent on modeling the real silicon behavior in SSTA. This includes that the statistical gate-delay models must consider arbitrary process variations and dependencies. In this paper, we introduce the innovative concept of Copulas to handle this topic. A complete Matlab based framework starting from process parameter statistics up to the computation of the statistical gate-delay distribution is presented. Experimental results demonstrate the importance of accounting realistic process variations.

Application of Fast Laser Deprocessing Techniques in Physical Failure Analysis on SRAM Memory of Advance Technology

2014 ◽  
Author(s):  
H.H. Yap ◽  
P.K. Tan ◽  
G.R. Low ◽  
M.K. Dawood ◽  
H. Feng ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Integrated Circuit ◽  
Cost Effective ◽  
Tetraethyl Orthosilicate ◽  
Ic Design ◽  
Advance Technology ◽  
Defect Identification ◽  
Technology Scaling ◽  
And Function ◽  
Metal Layers

Abstract With technology scaling of semiconductor devices and further growth of the integrated circuit (IC) design and function complexity, it is necessary to increase the number of transistors in IC’s chip, layer stacks, and process steps. The last few metal layers of Back End Of Line (BEOL) are usually very thick metal lines (>4μm thickness) and protected with hard Silicon Dioxide (SiO2) material that is formed from (TetraEthyl OrthoSilicate) TEOS as Inter-Metal Dielectric (IMD). In order to perform physical failure analysis (PFA) on the logic or memory, the top thick metal layers must be removed. It is time-consuming to deprocess those thick metal and IMD layers using conventional PFA workflows. In this paper, the Fast Laser Deprocessing Technique (FLDT) is proposed to remove the BEOL thick and stubborn metal layers for memory PFA. The proposed FLDT is a cost-effective and quick way to deprocess a sample for defect identification in PFA.

Research on Mathematical Modeling and Kinematic Simulation of Elliptic Family Gears

2013 ◽  
Vol 579-580 ◽  
pp. 300-304 ◽  
Author(s):  
Lian Xia ◽  
Da Zhu Li ◽  
Jiang Han
Keyword(s):  
Performance Analysis ◽  
Tooth Profile ◽  
High Order ◽  
Numerical Control ◽  
Gear Pair ◽  
Cylindrical Gear ◽  
Kinematic Simulation ◽  
Cad Modeling ◽  
Pure Rolling ◽  
Pitch Curve

Elliptic family gears are commonly used in non-circular gears, which include elliptic gear, high-order gear, elliptic deformed gear and high-order deformed gear, thereinto high-order deformed gear can include the elliptic family gears through adjust its order and deformed coefficient. Because non-circular gear has different tooth profile in different position of pitch curve and there is difference in the left and right tooth profile of the same gear tooth, thus the CAD modeling of non-circular gear is difficult for these characteristics; but the precise model of non-circular gear has important significance to the realization of numerical control machining, kinematic simulation and relevant mechanical analysis. This paper deduce the corresponding pure rolling mathematical model based on the pure rolling contact theory that cylindrical gear and non-circular gear mesh in the end face, and realize the CAD modeling of non-circular straight and helical gears by letting the cylindrical gear and non-circular gear make solid geometry operation, which is suitable for pitch curve with convex and concave. The non-circular gear shaping methods with equal polar and equal arc length are simulated by setting different discrete polar angles, and the transmission ratio curve and the angular acceleration curve of driven gear are get through the kinematic simulation of gear pair, which realize the transmission performance analysis of elliptic family gear pair. The above research results can be applied to the modeling and kinematic performance analysis of other non-circular gears.

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