Using a First Principles Coulomb Scattering Mobility Model for 4H-SiC MOSFET Device Simulation

2006 ◽  
Vol 527-529 ◽  
pp. 1321-1324 ◽  
Author(s):  
Siddharth Potbhare ◽  
Gary Pennington ◽  
Neil Goldsman ◽  
Aivars J. Lelis ◽  
Daniel B. Habersat ◽  
...  
Keyword(s):  
Surface Roughness ◽  
First Principles ◽  
Room Temperature ◽  
Device Simulation ◽  
Mobility Model ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Coulomb Scattering ◽  
Interface Traps ◽  
Low Field

A physics based device simulator for detailed numerical analysis of 4H-SiC MOSFETs with an advanced mobility model that accounts for the effects of bulk and surface phonons, surface roughness and Coulomb scattering by occupied interface traps and fixed oxide charges, has been developed. A first principles quasi-2D Coulomb scattering mobility model specifically for SiC MOSFETs has been formulated. Using this, we have been able to extract the interface trap density of states profile for 4H-SiC MOSFETs and have shown that at room temperature, Coulomb scattering controls the total mobility close to the interface. High temperature, low field simulations and experiments show that the current increases with increase in temperature. The effect of Coulomb scattering decreases with increase in temperature causing an increase in the total mobility near the interface at low gate voltages.

TCAD Modeling of a 1200 V SiC MOSFET

2018 ◽  
Vol 924 ◽  
pp. 689-692
Author(s):  
K. Lee ◽  
Benedetto Buono ◽  
Martin Domeij ◽  
Jimmy Franchi
Keyword(s):  
Surface Roughness ◽  
Room Temperature ◽  
Transfer Characteristic ◽  
Interface Trap ◽  
Coulomb Scattering ◽  
Interface Traps ◽  
Gate Bias ◽  
Channel Mobility ◽  
Output Characteristics ◽  
Increasing Temperature

In this work, TCAD modeling of a 1200 V SiC MOSFET is presented. The main focus is on modeling of the channel mobility, and the Coulomb scattering by interface traps and surface roughness are therefore included. For the Coulomb scattering, the interface trap profiles have been extrapolated from the subthreshold characteristics at room temperature, whereas the scattering due to surface roughness has been fitted by comparing to the transfer characteristics at high gate bias. A comparison with measurements for the transfer characteristic and the output characteristic is also presented. Results show that the reduction of the threshold voltage with increasing temperature and the temperature dependence of the output characteristics are properly modeled.

Using a First Principles Coulomb Scattering Mobility Model for 4H-SiC MOSFET Device Simulation

2006 ◽  
pp. 1321-1324
Author(s):  
S. Potbhare ◽  
Gary Pennington ◽  
Neil Goldsman ◽  
Aivars J. Lelis ◽  
D.B. Habersat ◽  
...  
Keyword(s):  
First Principles ◽  
Device Simulation ◽  
Mobility Model ◽  
Coulomb Scattering

Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs

2012 ◽  
Vol 717-720 ◽  
pp. 1101-1104 ◽  
Author(s):  
M.G. Jaikumar ◽  
Shreepad Karmalkar
Keyword(s):  
Surface Roughness ◽  
Measured Data ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Material Parameters ◽  
Velocity Saturation ◽  
Physical Mechanisms ◽  
Surface Roughness Scattering ◽  
Wide Range ◽  
Tcad Simulation

4H-Silicon Carbide VDMOSFET is simulated using the Sentaurus TCAD package of Synopsys. The simulator is calibrated against measured data for a wide range of bias conditions and temperature. Material parameters of 4H-SiC are taken from literature and used in the available silicon models of the simulator. The empirical parameters are adjusted to get a good fit between the simulated curves and measured data. The simulation incorporates the bias and temperature dependence of important physical mechanisms like interface trap density, coulombic interface trap scattering, surface roughness scattering and velocity saturation.

SiC MOSFET Channel Mobility Dependence on Substrate Doping and Temperature Considering High Density of Interface Traps

2007 ◽  
Vol 556-557 ◽  
pp. 835-838 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Michael R. Jennings ◽  
Philip A. Mawby ◽  
James A. Covington ◽  
Phillippe Godignon ◽  
...  
Keyword(s):  
Degradation Mechanism ◽  
Mobility Model ◽  
Effect Of Temperature ◽  
Coulomb Scattering ◽  
Interface Traps ◽  
Channel Mobility ◽  
Inversion Channel ◽  
Scattering Effects ◽  
Charge Concentration ◽  
Substrate Doping

In prior work we have proposed a mobility model for describing the mobility degradation observed in SiC MOSFET devices, suitable for being implemented into a commercial simulator, including Coulomb scattering effects at interface traps. In this paper, the effect of temperature and doping on the channel mobility has been modelled. The computation results suggest that the Coulomb scattering at charged interface traps is the dominant degradation mechanism. Simulations also show that a temperature increase implies an improvement in field-effect mobility since the inversion channel concentration increases and the trapped charge is reduced due to bandgap narrowing. In contrast, increasing the substrate impurity concentration further degrades the fieldeffect mobility since the inversion charge concentration decreases for a given gate bias. We have good agreement between the computational results and experimental mobility measurements.

A semi-empirical model for electron mobility at the SiC/SiO2 interface

2002 ◽  
Vol 742 ◽  
Author(s):  
Nelson S. Saks
Keyword(s):  
Surface Roughness ◽  
Empirical Model ◽  
Gate Voltage ◽  
Mobility Model ◽  
Coulomb Scattering ◽  
Mos Devices ◽  
Surface Roughness Scattering ◽  
Hall Effect Measurements ◽  
Semi Empirical ◽  
Mos Device

ABSTRACTThe mobility of electrons in inversion layers at SiC/SiO2 interfaces μinv has been characterized in 4H- and 6H-SiC using Hall effect measurements. In order to understand the cause of the low mobilities typically observed in SiC MOS devices, a semi-empirical mobility model has been developed based on a previous model for silicon inversion layers. Using this model, two scattering mechanisms, surface phonon and Coulomb scattering from high densities of electrons trapped at the SiC/SiO2 interface, are found to account reasonably well for the behavior of the mobility. The model employs a changing density of trapped electrons as a function of gate voltage to accurately model Coulomb scattering. Surprisingly, evidence of surface roughness scattering is not observed in any SiC MOS device.

The Electrical Characteristics of a Pd/AlN/Si Thin Film Hydrogen Gas Sensor

2003 ◽  
Vol 801 ◽  
Author(s):  
Erik F. McCullen ◽  
Haripriya E. Prakasam ◽  
Wenjun Mo ◽  
Jagdish Thakur ◽  
Ratna Naik ◽  
...  
Keyword(s):  
Thin Film ◽  
Surface States ◽  
Hydrogen Gas ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Interface Traps ◽  
Electrical Characteristics ◽  
Film Sensor ◽  
Si Thin Film

ABSTRACTWe have extended our previous investigation of the electrical characteristics of a Pd/AlN/Si thin film sensor for varying thicknesses of AlN, from 300–2000Å. The capacitance vs. voltage, C(V), and conductance vs. voltage, G(V), measurements were utilized to investigate the presence of surface states within the Si gap at the AlN/Si interface. Our previous experiments on 500Å AlN did show the presence of interface traps, with an estimated surface density between 8×1014 and 1.5×1015 m−2eV−1 [1]. In our present work we've examined the effect of AlN thickness on the density of these interface traps. The density is dependent on AlN thickness. The thinner devices, 300Å, showed an interface trap density of 20–30×1015 m−2eV−1. The interface trap density decreased with increasing thickness up to 500Å, where the density remained relatively constant at about 1–5×1015 m−2eV−1 for thicknesses up to 2000Å. We have also shown that the interface trap density is independent of annealing.

A Relationship between Interface Trap Density and Transconductance in 6H-SiC Enhancement Mode Field Effect Transistors

1995 ◽  
Vol 410 ◽  
Author(s):  
M. W. Dryfuse ◽  
M. Tabib-Azar
Keyword(s):  
Experimental Data ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Interface Traps ◽  
Pertinent Literature ◽  
Enhancement Mode ◽  
Mode Field ◽  
Simplifying Assumptions

ABSTRACTAn explicit analytical expression relating the interface trap densities and transconductance is derived for enhancement mode field effect transistors without any simplifying assumptions regarding the energy distribution of traps. Using this relationship, the interface trap densities were calculated from transconductance data and compared to experimental data and that provided in the literature. Our expression provides a simple and convenient method to reliably estimate interface traps densities from the readily available transconductance data provided in the pertinent literature.

scholarly journals Identification of Slow States at the SiO2/SiC Interface through Sub-Bandgap Illumination

2012 ◽  
Vol 717-720 ◽  
pp. 801-804
Author(s):  
Christopher M. Spargo ◽  
Benjamin J.D. Furnival ◽  
R.M. Mahapatra ◽  
J.P. Goss ◽  
Nicolas G. Wright ◽  
...  
Keyword(s):  
Band Gap ◽  
Deep Level ◽  
Interface States ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Interface Traps ◽  
The Creation ◽  
Minority Carriers

We show that it is possible to obtain information relating to deep level interface traps, or so called ‘slow states’, by using the photo-CV characterisation method. Sub-bandgap illumination has been chosen in order to avoid band-to-band excitation for the creation of minority carriers. This enables information to be extracted from trapping states at the SiO2/SiC interface that are energetically deep within the band gap. Empirical observations of deep level trapping states with life times in the order of tens of hours are reported and the interface trap density as a function of energy has been extracted using the Terman method. Characterisation of these interface states will aid the development of new fabrication processes, with the aim of reducing the interface trap density to the same level as that of the SiO2/Si interface and facilitating the production of higher quality SiC based devices.

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