Germanium – Silicon Carbide Heterojunction Diodes – A Study in Device Characteristics with Increasing Layer Thickness and Deposition Temperature

2010 ◽  
Vol 645-648 ◽  
pp. 889-892
Author(s):  
Peter M. Gammon ◽  
Amador Pérez-Tomás ◽  
Michael R. Jennings ◽  
G.J. Roberts ◽  
V.A. Shah ◽  
...  

SiC schottky diodes take advantage of the material's superior reverse breakdown voltage when compared to Silicon (Si) [1]. However, when considered for MOSFET applications, the high concentration of interface traps at the SiC/SiO2 interface reduce the material's already low channel mobility [2]. Therefore, a Ge/SiC heterojunction solution becomes an attractive prospect, whereby the Ge forms the control region after being epitaxially grown on the SiC. With a well established Ge-High K dielectric technology [3], a carbon-free oxide would exist, leaving a channel-region with a mobility approximately four times that of SiC.

2006 ◽  
Vol 527-529 ◽  
pp. 1171-1174 ◽  
Author(s):  
A. Kumta ◽  
E. Rusli ◽  
Chin Che Tin

Silicon carbide (SiC) field plate terminated Schottky diodes using silicon dioxide (Si02) dielectric experience high electric field in the insulator and premature dielectric breakdown, attributed to the lower dielectric constant of the oxide. This problem can be addressed by using high-k dielectrics such as silicon nitride (Si3N4) that will reduce the field, increase the breakdown voltage and consequently improve the lifetime of the devices. While the advantages of single step field-plate terminated diodes are well-known, the breakdown voltage can be improved even further using a dual-step field-plate termination. Our 2D-numerical simulations using MEDICI have shown an improvement in breakdown voltages in excess of 25% compared to the traditional single-step field-plate terminated diodes.


2018 ◽  
Author(s):  
Seng Nguon Ting ◽  
Hsien-Ching Lo ◽  
Donald Nedeau ◽  
Aaron Sinnott ◽  
Felix Beaudoin

Abstract With rapid scaling of semiconductor devices, new and more complicated challenges emerge as technology development progresses. In SRAM yield learning vehicles, it is becoming increasingly difficult to differentiate the voltage-sensitive SRAM yield loss from the expected hard bit-cells failures. It can only be accomplished by extensively leveraging yield, layout analysis and fault localization in sub-micron devices. In this paper, we describe the successful debugging of the yield gap observed between the High Density and the High Performance bit-cells. The SRAM yield loss is observed to be strongly modulated by different active sizing between two pull up (PU) bit-cells. Failure analysis focused at the weak point vicinity successfully identified abnormal poly edge profile with systematic High k Dielectric shorts. Tight active space on High Density cells led to limitation of complete trench gap-fill creating void filled with gate material. Thanks to this knowledge, the process was optimized with “Skip Active Atomic Level Oxide Deposition” step improving trench gap-fill margin.


2012 ◽  
Vol 29 (5) ◽  
pp. 057702 ◽  
Author(s):  
Yue-Chan Kong ◽  
Fang-Shi Xue ◽  
Jian-Jun Zhou ◽  
Liang Li ◽  
Chen Chen ◽  
...  

2012 ◽  
Vol 45 (3) ◽  
pp. 537-542 ◽  
Author(s):  
C.-Y. Wu ◽  
P.-Y. Hsu ◽  
C. L. Wang ◽  
T.-C. Liao ◽  
H.-C. Cheng ◽  
...  

2007 ◽  
Vol 556-557 ◽  
pp. 835-838 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Michael R. Jennings ◽  
Philip A. Mawby ◽  
James A. Covington ◽  
Phillippe Godignon ◽  
...  

In prior work we have proposed a mobility model for describing the mobility degradation observed in SiC MOSFET devices, suitable for being implemented into a commercial simulator, including Coulomb scattering effects at interface traps. In this paper, the effect of temperature and doping on the channel mobility has been modelled. The computation results suggest that the Coulomb scattering at charged interface traps is the dominant degradation mechanism. Simulations also show that a temperature increase implies an improvement in field-effect mobility since the inversion channel concentration increases and the trapped charge is reduced due to bandgap narrowing. In contrast, increasing the substrate impurity concentration further degrades the fieldeffect mobility since the inversion charge concentration decreases for a given gate bias. We have good agreement between the computational results and experimental mobility measurements.


2011 ◽  
Vol 1315 ◽  
Author(s):  
D. K. Ngwashi ◽  
R. B. M. Cross ◽  
S. Paul ◽  
Andrian P. Milanov ◽  
Anjana Devi

ABSTRACTIn order to investigate the performance of ZnO-based thin film transistors (ZnO-TFTs), we fabricate devices using amorphous hafnium dioxide (HfO2) high-k dielectrics. Sputtered ZnO was used as the active channel layer, and aluminium source/drain electrodes were deposited by thermal evaporation, and the HfO2 high-k dielectrics are deposited by metal-organic chemical vapour deposition (MOCVD). The ZnO-TFTs with high-k HfO2 gate insulators exhibit good performance metrics and effective channel mobility which is appreciably higher in comparison to SiO2-based ZnO TFTs fabricated under similar conditions. The average channel mobility, turn-on voltage, on-off current ratio and subthreshold swing of the high-k TFTs are 31.2 cm2V-1s-1, -4.7 V, ~103, and 2.4 V/dec respectively. We compared the characteristics of a typical device consisting of HfO2 to those of a device consisting of thermally grown SiO2 to examine their potential for use as high-k dielectrics in future TFT devices.


2017 ◽  
Vol 897 ◽  
pp. 571-574 ◽  
Author(s):  
Vidya Naidu ◽  
Sivaprasad Kotamraju

Silicon Carbide (SiC) based MOS devices are one of the promising devices for high temperature, high switching frequency and high power applications. In this paper, the static and dynamic characteristics of an asymmetric trench gate SiC IGBT with high-k dielectrics- HfO2 and ZrO2 are investigated. SiC IGBT with HfO2 and ZrO2 exhibited higher forward transconductance ratio and lower threshold voltage compared to conventionally used SiO2. In addition, lower switching power losses have been observed in the case of high-k dielectrics due to reduced tail current duration.


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