High-Mobility SiC MOSFETs with Chemically Modified Interfaces

2015 ◽  
Vol 821-823 ◽  
pp. 749-752 ◽  
Author(s):  
Daniel J. Lichtenwalner ◽  
Lin Cheng ◽  
Sarit Dhar ◽  
Anant K. Agarwal ◽  
Scott Allen ◽  
...  
Keyword(s):  
Nitric Oxide ◽  
Field Effect ◽  
Alkaline Earth ◽  
Phonon Scattering ◽  
High Mobility ◽  
Interface Layer ◽  
Interface State ◽  
State Density ◽  
Oxide Semiconductor ◽  
Alkaline Earth Elements

Alkali (Rb, Cs) and alkaline earth elements (Sr, Ba) provide SiO2/SiC interface conditions suitable for obtaining high metal-oxide-semiconductor field-effect-transistor (MOSFET) channel mobility on the 4H-SiC Si-face (0001), without the standard nitric oxide (NO) anneal. The alkali elements Rb and Cs result in field-effect mobility (μFE) values >25 cm2/V.s, and the alkaline earth elements Sr and Ba resulted in higher μFE values of 40 and 85 cm2/V.s, respectively. The Ba-modified MOSFETs show a slight decrease in mobility with heating to 150 °C, as expected when mobility is not interface-trap-limited, but phonon-scattering-limited. The interface state density is lower than that obtained with nitric oxide (NO) passivation. Devices with a Ba interface layer maintain stable mobility and threshold voltage under ±2 MV/cm gate bias stress at 175 °C, indicating no mobile ions.

High-Mobility SiC MOSFETs with Alkaline Earth Interface Passivation

2016 ◽  
Vol 858 ◽  
pp. 671-676 ◽  
Author(s):  
Daniel J. Lichtenwalner ◽  
Vipindas Pala ◽  
Brett A. Hull ◽  
Scott Allen ◽  
John W. Palmour
Keyword(s):  
Nitric Oxide ◽  
Field Effect ◽  
Alkaline Earth ◽  
Phonon Scattering ◽  
Breakdown Strength ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Field Effect Mobility ◽  
Channel Mobility ◽  
Alkaline Earth Elements

Alkaline earth elements Sr and Ba provide SiO2/SiC interface conditions suitable for obtaining high channel mobility metal-oxide-semiconductor field-effect-transistors (MOSFETs) on the Si-face (0001) of 4H-SiC, without the standard nitric oxide (NO) anneal. The alkaline earth elements Sr and Ba located at/near the SiO2/SiC interface result in field-effect mobility (μFE) values as high as 65 and 110 cm2/V.s, respectively, on 5×1015 cm-3 Al-doped p-type SiC. As the SiC doping increases, peak mobility decreases as expected, but the peak mobility remains higher for Ba interface layer (Ba IL) devices compared to NO annealed devices. The Ba IL MOSFET field-effect mobility decreases as the temperature is increased to 150 °C, as expected when mobility is phonon-scattering-limited, not interface-trap-limited. This is in agreement with measurements of the interface state density (DIT) using the high-low C-V technique, indicating that the Ba IL results in lower DIT than that of samples with nitric oxide passivation. Vertical power MOSFET (DMOSFET) devices (1200V, 15A) fabricated with the Ba IL have a 15% lower on-resistance compared to devices with NO passivation. The DMOSFET devices with a Ba IL maintain a stable threshold voltage under NBTI stress conditions of-15V gate bias stress, at 150 °C for 100hrs, indicating no mobile ions. Secondary-ion mass-spectrometry (SIMS) analysis confirms that the Sr and Ba remain predominantly at the SiO2/SiC interface, even after high temperature oxide annealing, consistent with the observed high channel mobility after these anneals. The alkaline earth elements result in enhanced SiC oxidation rate, and the resulting gate oxide breakdown strength is slightly reduced compared to NO annealed thermal oxides on SiC.

Improved Field Effect Mobility in Si-Face 4H-SiC MOSFETs with a Deposited SiNx Interface Layer

2019 ◽  
Vol 963 ◽  
pp. 469-472 ◽  
Author(s):  
Teruaki Kumazawa ◽  
Mitsuo Okamoto ◽  
Miwako Iijima ◽  
Yohei Iwahashi ◽  
Shinji Fujikake ◽  
...  
Keyword(s):  
Field Effect ◽  
Atomic Layer ◽  
Interface Layer ◽  
Interface State ◽  
State Density ◽  
Field Effect Mobility ◽  
Optimal Thickness ◽  
Interface Quality ◽  
Mos Devices ◽  
Layer Deposition

The SiO2/SiC interface quality has a significant effect on the performance of 4H-SiC MOS devices. The introduction of nitrogen to the SiO2/SiC interface is a well-known method for reducing the interface state density (Dit). In this study, we introduced nitrogen to the SiO2/SiC interface by forming SiNx films using atomic layer deposition (ALD) and thus improved the interface quality. O2 annealing with a SiNx interface layer of optimal thickness enhanced the field effect mobility.

Preannealing Effect on Mobility of N-/Al-Coimplanted and Over-Oxidized 4H-SiC MOSFETs

2010 ◽  
Vol 645-648 ◽  
pp. 487-490 ◽  
Author(s):  
Yuichiro Nanen ◽  
Bernd Zippelius ◽  
Svetlana Beljakowa ◽  
Lia Trapaidze ◽  
Michael Krieger ◽  
...  
Keyword(s):  
Mass Spectroscopy ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Metal Oxide Semiconductor ◽  
Interface State Density ◽  
Oxide Semiconductor ◽  
Effective Mobility ◽  
Secondary Ion

The authors investigated the effect of preannealing on N-/Al-coimplanted and over-oxidized Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). The preannealing process causes a decrease of the Hall mobility and the effective mobility, and an increase of the interface state density. Secondary ion mass spectroscopy (SIMS) measurements revealed that the N concentration at the SiO2/SiC interface in preannealed samples is lower than in not-preannealed samples, which might be the reason for in the increase of the interface state density. In MOSFETs without preannealing, more N atoms are piled up at the SiO2/SiC interface, leading to the lower interface state density and higher mobility.

Improved MOS Interface Properties of C-Face 4H-SiC by POCl3 Annealing

2011 ◽  
Vol 679-680 ◽  
pp. 425-428 ◽  
Author(s):  
Shinya Kotake ◽  
Hiroshi Yano ◽  
Dai Okamoto ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Oxide Semiconductor ◽  
Conduction Band Edge ◽  
Mos Capacitors ◽  
Phosphorus Containing ◽  
New Process ◽  
Mos Structures

Metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) were fabricated on C-face 4H-SiC with post-oxidation annealing in phosphorus- containing atmosphere. POCl3/N2 annealing at 1000 °C, which is an effective condition for Si-face, did not bring any improvement in the interface state density (Dit) for C-face due to additional oxide growth. We have developed a new process sequence suitable for C-face MOS structures. As a result, the Dit near the conduction band edge was drastically decreased by the developed process to less than 3x1011 cm−2eV−1. The field-effect mobility of C-face 4H-SiC MOSFETs was effectively increased to 37 cm2/Vs. We found that the incorporation of phosphorus atoms into the SiO2/SiC interface can improve MOSFET performance not only for the Si-face but also for the C-face.

High Integrity SiO2/Al2O3 Gate Stack for Normally-off GaN MOSFET

2013 ◽  
Vol 1561 ◽  
Author(s):  
Hiroshi Kambayashi ◽  
Takehiko Nomura ◽  
Hirokazu Ueda ◽  
Katsushige Harada ◽  
Yuichiro Morozumi ◽  
...  
Keyword(s):  
Field Effect ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Gate Insulator ◽  
Oxide Semiconductor ◽  
Breakdown Field ◽  
Mos Transistors ◽  
Gate Stack ◽  
High Integrity

ABSTRACTHigh integrity SiO2/Al2O3 gate stack has been demonstrated for GaN metal-oxide-semiconductor (MOS) transistors. The SiO2 film formed on GaN by the microwave-excited plasma enhanced chemical vapor deposition (MW-PECVD) exhibits good properties compared that by the LP (Low Pressure)-CVD. Then, by incorporating the advantages of both of SiO2 with a high insulating and Al2O3 with good interface characteristics, the SiO2/Al2O3 gate stack structure has been employed in GaN MOS devices. The structure shows a low interface state density between gate insulator and GaN, a high breakdown field, and a large charge-to-breakdown by applying 3-nm Al2O3. The SiO2/Al2O3 gate stack has also been applied to AlGaN/GaN hybrid MOS heterojunction field-effect transistor (HFET) and the HFET shows excellent properties with the threshold voltage of 4.2 V and the maximum field-effect mobility of 192 cm2/Vs.

scholarly journals Ab initio perspective of ultra-scaled CMOS from 2D-material fundamentals to dynamically doped transistors

2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Aryan Afzalian
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
High Mobility ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Grand Challenge ◽  
Gate Length ◽  
Delay Performance ◽  
Effect Transistor

AbstractUsing accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10-nm scaling for high-performance complementary metal oxide semiconductor (CMOS) applications. We show that a combination of good electrostatic control together with high mobility is paramount to meet the stringent roadmap targets. Such requirements typically play against each other at sub-10-nm gate length for MOS transistors made of conventional semiconductor materials like Si, Ge, or III–V and dimensional scaling is expected to end ~12 nm gate-length (pitch of 40 nm). We demonstrate that using alternative 2D channel materials, such as the less-explored HfS2 or ZrS2, high-drive current down to ~6 nm is, however, achievable. We also propose a dynamically doped field-effect transistor concept, that scales better than its MOSFET counterpart. Used in combination with a high-mobility material such as HfS2, it allows for keeping the stringent high-performance CMOS on current and competitive energy-delay performance, when scaling down to virtually 0 nm gate length using a single-gate architecture and an ultra-compact design (pitch of 22 nm). The dynamically doped field-effect transistor further addresses the grand-challenge of doping in ultra-scaled devices and 2D materials in particular.

Properties of MOS Structure Fabricated on 3C-SiC Grown by Reactive Magnetron Sputtering.

1994 ◽  
Vol 339 ◽  
Author(s):  
R. Turan ◽  
Q. Wahab ◽  
L. Hultman ◽  
M. Willander ◽  
J. -E. Sundgren
Keyword(s):  
Magnetron Sputtering ◽  
Interface State ◽  
State Density ◽  
Reactive Magnetron Sputtering ◽  
Oxide Semiconductor ◽  
Reactive Magnetron ◽  
Cross Sectional ◽  
Mos Structure ◽  
Transmission Electron ◽  
Wide Bandgap Materials

ABSTRACTWe report the fabrication and the characterization of Metal Oxide Semiconductor (MOS) structure fabricated on thermally oxidized 3C-SiC grown by reactive magnetron sputtering. The structure and the composition of the SiO2 layer was studied by cross-sectional transmission electron microscopy (XTEM) Auger electron spectroscopy (AES). Homogeneous stoichiometric SiO2 layers formed with a well-defined interface to the faceted SiC(lll) top surface. Electrical properties of the MOS capacitor have been analyzed by employing the capacitance and conductance techniques. C-V curves shows the accumulation, depletion and deep depletion phases. The capacitance in the inversion regime is not saturated, as usually observed for wide-bandgap materials. The unintentional doping concentration determined from the 1/C2 curve was found to be as low as 2.8 × 1015 cm-3. The density of positive charges in the grown oxide and the interface states have been extracted by using high-frequency C-V and conductance techniques. The interface state density has been found to be in the order of 1011cm2-eV-1.

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