Enabling High-Performance Heterogeneous Integration via Interface Standards, IP Reuse, and Modular Design

2018 ◽  
Vol 2018 (1) ◽  
pp. 000246-000251
Author(s):  
Andreas Olofsson ◽  
Daniel S. Green ◽  
Jeffrey Demmin
Keyword(s):  
High Performance ◽  
Printed Circuit Board ◽  
Modular Design ◽  
Semiconductor Industry ◽  
Leading Edge ◽  
Cost Effective ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Prohibitive Cost ◽  
Ip Reuse

Abstract DARPA is leading a new thrust to leverage mainstream semiconductor design approaches to enable the rapid and cost-effective integration of heterogeneous device technologies. This represents a leap ahead beyond the monolithic silicon approach that has served the semiconductor industry well, but which now creates prohibitive cost and design issues at leading-edge nodes, as well as performance constraints without the benefits of broad device technology options. DARPA's Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) program will develop interface standards, IP reuse methodologies, and modular design approaches with the goal of making heterogeneous integration as straightforward as printed circuit board design and assembly, without compromising device performance. An overview of the program's vision, goals, and progress to date is presented here.

scholarly journals A Self-Powered Nanogenerator for the Electrical Protection of Integrated Circuits from Trace Amounts of Liquid

2019 ◽  
Vol 12 (1) ◽  
Author(s):  
Zhuang Hui ◽  
Ming Xiao ◽  
Daozhi Shen ◽  
Jiayun Feng ◽  
Peng Peng ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Printed Circuit Board ◽  
Short Circuit ◽  
High Sensitivity ◽  
Short Circuit Current ◽  
Fast Response ◽  
Open Circuit ◽  
Circuit Board ◽  
Self Powered

Abstract With the increase in the use of electronic devices in many different environments, a need has arisen for an easily implemented method for the rapid, sensitive detection of liquids in the vicinity of electronic components. In this work, a high-performance power generator that combines carbon nanoparticles and TiO2 nanowires has been fabricated by sequential electrophoretic deposition (EPD). The open-circuit voltage and short-circuit current of a single generator are found to exceed 0.7 V and 100 μA when 6 μL of water was applied. The generator is also found to have a stable and reproducible response to other liquids. An output voltage of 0.3 V was obtained after 244, 876, 931, and 184 μs, on exposure of the generator to 6 μL of water, ethanol, acetone, and methanol, respectively. The fast response time and high sensitivity to liquids show that the device has great potential for the detection of small quantities of liquid. In addition, the simple easily implemented sequential EPD method ensures the high mechanical strength of the device. This compact, reliable device provides a new method for the sensitive, rapid detection of extraneous liquids before they can impact the performance of electronic circuits, particularly those on printed circuit board.

In-Plane Electromagnetic Generator Fabricated on Printed Circuit Board Technology

2013 ◽  
Vol 479-480 ◽  
pp. 524-529
Author(s):  
C.T. Pan ◽  
F.T. Hsu ◽  
C.C. Nien ◽  
Z.H. Liu ◽  
Y.J. Chen ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Energy Harvester ◽  
Cost Effective ◽  
Circuit Board ◽  
Outer Diameter ◽  
Magnetic Element ◽  
Induced Voltage ◽  
Element Analysis ◽  
Printed Circuit ◽  
Electromagnetic Generator

Small and efficient energy harvesters, as a renewable power supply, draw lots of attention in the last few years. This paper presents a planar rotary electromagnetic generator with copper coils fabricated by using printed circuit board (PCB) as inductance and Nd-Fe-B magnets as magnetic element. Coils are fabricated on PCB, which is presumably cost-effective and promising methods. 28-pole Nd-Fe-B magnets with outer diameter of 50 mm and thickness of 2 mm was sintered and magnetized, which can provide magnetic field of 1.44 Tesla. This harvester consists of planar multilayer with multi-pole coils and multi-pole permanent magnet, and the volume of this harvester is about 50x50x2.5 mm3. Finite element analysis is used to design energy harvesting system, and simulation model of the energy harvester is established. In order to verify the simulation, experiment data are compared with simulation result. The PCB energy harvester prototype can generate induced voltage 0.61 V and 13.29mW output power at rotary speed of 4,000 rpm.

Integration of a K-Band Receiver Front-End Using a Copper Core Printed Circuit Board

2018 ◽  
Vol 2018 (1) ◽  
pp. 000384-000388
Author(s):  
Brian Curran ◽  
Jacob Reyes ◽  
Christian Tschoban ◽  
Ivan Ndip ◽  
Klaus-Dieter Lang ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Antenna Arrays ◽  
High Frequency ◽  
Printed Circuit Board ◽  
Cost Effective ◽  
Circuit Board ◽  
Front End ◽  
High Bandwidth ◽  
Increasing Demand ◽  
K Band

Abstract Increasing demand for high bandwidth wireless satellite connections and telecommunications has resulted in interest in steerable antenna arrays in the GHz frequency range. These applications require cost-effective integration technologies for high frequency and high power integrated circuits (ICs) using GaAs, for example. In this paper, an integration platform is proposed, that enables GaAs ICs to be directly placed on a copper core inside cavities of a high frequency laminate for optimal cooling purposes. The platform is used to integrate a K-Band receiver front-end, composed of four GaAs ICs, with linear IF output power for input powers above −40dBm and a temperature of 42°C during operation.

Design, Materials, Process, and Fabrication of Fan-Out Panel-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 141-147 ◽  
Author(s):  
Cheng-Ta Ko ◽  
Henry Yang ◽  
John Lau ◽  
Ming Li ◽  
Margie Li ◽  
...  
Keyword(s):  
Seed Layer ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Assembly Process ◽  
Molding Compound ◽  
Printed Circuit ◽  
Chip Size ◽  
Design Materials ◽  
Dry Film

Abstract The design, materials, process, and fabrication of a heterogeneous integration of four chips by a fan-out panel-level packaging (FOPLP) method are investigated in this study. Emphasis is placed on (1) the application of a dry-film epoxy molding compound for molding the chips and (2) the application of a special assembly process called uni-substrate-integrated package for fabricating the redistribution layers (RDLs) of the FOPLP. The Ajinomoto build-up film is used as the dielectric of the RDLs and is built up by the semiadditive process. Electroless Cu is used to make the seed layer, laser direct imaging is used for opening the photoresist, and printed circuit board (PCB) Cu plating is used for making the conductor wiring of the RDLs. The panel dimensions are 508 × 508 mm. The package dimensions of the FOPLP are 10 × 10 mm. The large chip size and the small chip sizes are, respectively, 5 × 5 mm and 3 × 3 mm. The uniqueness of this study is that all the processes are carried out by using the PCB equipment.

Reliability of Fan-Out Wafer-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Thermal Cycling Test ◽  
Wafer Level ◽  
Molding Compound ◽  
Shock Test ◽  
Cycling Test

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.

scholarly journals CortiWatch: watch-based cortisol tracker

2019 ◽  
Vol 5 (9) ◽  
pp. FSO416 ◽  
Author(s):  
Paul Rice ◽  
Sayali Upasham ◽  
Badrinath Jagannath ◽  
Roshan Manuel ◽  
Madhavi Pali ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Cost Effective ◽  
Circuit Board ◽  
Electrochemical Technique ◽  
Label Free ◽  
Printed Circuit ◽  
Electrochemical Testing ◽  
Testing Techniques ◽  
Small Form Factor ◽  
A Current

Sweat-based analytics have recently caught the attention of researchers and medical professionals alike because they do not require professionally trained personnel or invasive collection techniques to obtain a sample. The following presents a small form-factor biosensor for reporting physiological ranges of cortisol present in ambient sweat (8–151 ng/ml). This device obtains cortisol measurements through low volumes of unstimulated sweat from the user’s wrist. We designed a potentiostatic circuit on a printed circuit board to perform electrochemical testing techniques. The detection modality developed for quantifying sensor response to varying cortisol concentrations is a current based electrochemical technique, chronoamperometry (CA). From the results, the sensor can detect cortisol in the physiologically relevant ranges of cortisol; thus, the sensor is a noninvasive, label free, cost-effective solution for tracking cortisol levels for circadian diagnostics.

scholarly journals HIGH-PERFORMANCE FLEXIBLE FORCE AND TEMPERATURE SENSING ARRAY WITH A ROBUST STRUCTURE

2013 ◽  
Vol 24 ◽  
pp. 1360014
Author(s):  
MIN-SEOK KIM ◽  
HAN-WOOK SONG ◽  
YON-KYU PARK
Keyword(s):  
High Performance ◽  
Sensor Array ◽  
Printed Circuit Board ◽  
High Spatial Resolution ◽  
Tactile Sensor ◽  
Circuit Board ◽  
Micro Fabrication ◽  
Printed Circuit ◽  
Flexible Printed Circuit ◽  
Physical Quantities

We have developed a flexible tactile sensor array capable of sensing physical quantities, e.g. force and temperature with high-performances and high spatial resolution. The fabricated tactile sensor consists of 8 × 8 force measuring array with 1 mm spacing and a thin metal (copper) temperature sensor. The flexible force sensing array consists of sub-millimetre-size bar-shaped semi-conductor strain gage array attached to a thin and flexible printed circuit board covered by stretchable elastomeric material on both sides. This design incorporates benefits of both materials; the semi-conductor's high performance and the polymer's mechanical flexibility and robustness, while overcoming their drawbacks of those two materials. Special fabrication processes, so called “dry-transfer technique” have been used to fabricate the tactile sensor along with standard micro-fabrication processes.

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