Ceramic-Based Planar Heat Pipe (Plate) for Passive Electronics Cooling

2011 ◽  
Vol 2011 (CICMT) ◽  
pp. 000159-000165
Author(s):  
M. Wilson ◽  
H. Anderson ◽  
J. Fellows ◽  
C. Lewinsohn
Keyword(s):  
Integrated Circuits ◽  
Phase Change ◽  
Heat Dissipation ◽  
Thermal Contact ◽  
Three Dimensional ◽  
Electronics Cooling ◽  
Ceramic Materials ◽  
Back Side ◽  
Dimensional Network ◽  
Internal Networks

Heat dissipation has become a major hurdle for the electronics industry, especially as higher performance integrated circuits are being developed for the power industry. Two of the primary hurdles in dissipating this heat are:The thermal contact resistance between the IC and the cooling device.The ability to effectively spread the heat, such that traditional cooling technologies can be effective.By selecting ceramic materials that are thermo-mechanically matched (CTE) to IC materials, the proposed heat plate can be directly bonded by typical solder or braze techniques to the back-side of the IC. This eliminates thermal resistances due to contact and thermal interface materials. Within these heat plates, a three dimensional network of gas channels and fluid wicks spread the high-flux heat loads from localized hot spots to the surrounding regions via phase change fluids and mass transport. Like traditional heat pipes, these heat plates operate at nearly uniform temperature due to the phase change. The internal networks provide for multidimensional heat and mass flow, increasing their dissipating capability. By using matched ceramic materials, and the inclusion of a heat plate, these primary hurdles for heat dissipation can be mitigated. The performance of prototypical planar heat plates will be presented.

Benchmarking Study on the Thermal Management Landscape for Three-Dimensional Integrated Circuits: From Back-Side to Volumetric Heat Removal

2016 ◽  
Vol 138 (1) ◽  
Author(s):  
Thomas Brunschwiler ◽  
Arvind Sridhar ◽  
Chin Lee Ong ◽  
Gerd Schlottig
Keyword(s):  
Integrated Circuits ◽  
Thermal Management ◽  
Integrated Circuit ◽  
Power Dissipation ◽  
High Performance ◽  
Heat Dissipation ◽  
Hybrid Approach ◽  
Three Dimensional ◽  
Heat Removal ◽  
Back Side

An overview of the thermal management landscape with focus on heat dissipation from three-dimensional (3D) chip stacks is provided in this study. Evolutionary and revolutionary topologies, such as single-side, dual-side, and finally, volumetric heat removal, are benchmarked with respect to a high-performance three-tier chip stack with an aggregate power dissipation of 672 W. The thermal budget of 50 K can be maintained by three topologies, namely: (1) dual-side cooling, implemented by a thermally active interposer, (2) interlayer cooling with four-port fluid delivery and drainage at 100 kPa pressure drop, and (3) a hybrid approach combining interlayer with embedded back-side cooling. Of all the heat-removal concepts, interlayer cooling is the only approach that scales with the number of dies in the chip stack and hence enables extreme 3D integration. However, the required size of the microchannels competes with the requirement of low through-silicon-via (TSV) heights and pitches. A scaling study was performed to derive the TSV pitch that is compatible with cooling channels to dissipate 150 W/cm2 per tier. An active integrated circuit (IC) area of 4 cm2 was considered, which had to be implemented on the varying tier count in the stack. A cuboid form factor of 2 mm × 4 mm × 2.55 mm results from a die count of 50. The resulting microchannels of 2 mm length allow small hydraulic diameters and thus a very high TSV density of 1837 1/mm2. The accumulated heat flux and the volumetric power dissipation are as high as 7.5 kW/cm2 and 29 kW/cm3, respectively.

Layout Based Full Chip Thermal Simulations of Stacked 3D Integrated Circuits

2003 ◽  
Author(s):  
Ashok Raman ◽  
Marek Turowski ◽  
Monte Mar
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Hot Spots ◽  
Heat Dissipation ◽  
Three Dimensional ◽  
3D Ic ◽  
Localized Heating ◽  
3D Integrated Circuits ◽  
Thermal Simulations

This paper presents full-chip scale detailed thermal simulations of three-dimensional (3D) integrated circuit (IC) stacks. The inter-layer dielectric (ILD) and inter-metal dielectric (IMD) materials inside 3D IC stacks may cause extensive localized heating. The influence of multiple layers of dielectrics on heat trapping inside the 3D stack is analyzed. Different methods to minimize such localized heating are studied. It is shown that the use of thermal vias is very effective in heat dissipation from the hot spots. Comparisons are made between several 3D IC configurations to verify these conclusions.

scholarly journals Investigation of Thermal Properties of Novel Phase Change Material Mixtures (Octadecane-Diamond) with Laser Flash Analysis

2019 ◽  
Vol 26 (4) ◽  
pp. 211-218
Author(s):  
Mateusz Sierakowski ◽  
Wojciech Godlewski ◽  
Roman Domański ◽  
Jakub Kapuściński ◽  
Tomasz Wiśniewski ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Thermal Properties ◽  
Phase Change ◽  
Power Plants ◽  
Large Scale ◽  
Phase Change Materials ◽  
Heat Dissipation ◽  
Electronics Cooling ◽  
Diamond Powder ◽  
Heat Of Fusion

AbstractPhase change materials (PCMs) are widely used in numerous engineering fields because of their good heat storage properties and high latent heat of fusion. However, a big group of them has low thermal conductivity and diffusivity, which poses a problem when it comes to effective and relatively fast heat transfer and accumulation. Therefore, their use is limited to systems that do not need to be heated or cooled rapidly. That is why they are used as thermal energy storage systems in both large scale in power plants and smaller scale in residential facilities. Although, if PCMs are meant to play an important role in electronics cooling, heat dissipation, or temperature stabilization in places where the access to cooling water is limited, such as electric automotive industry or hybrid aviation, a number of modifications and improvements needs to be introduced. Investigation whether additional materials of better thermal properties will affect the thermal properties of PCM is therefore of a big interest. An example of such material is diamond powder, which is a popular additive used in abradants. Its thermal diffusivity and conductivity is significantly higher than for a pure PCM. The article presents the results of an analysis of the effect of diamond powder on thermal conductivity and diffusivity of phase change materials in the case of octadecane.

Thermoelectric Coolers for Hotspot Thermal Management of 3D Stacked Chips

2011 ◽  
Author(s):  
Matthew Redmond ◽  
Kavin Manickaraj ◽  
Owen Sullivan ◽  
Satish Kumar
Keyword(s):  
Integrated Circuits ◽  
Thermal Management ◽  
Power Density ◽  
Hot Spot ◽  
Thermal Contact ◽  
Three Dimensional ◽  
Heat Removal ◽  
Thermoelectric Coolers ◽  
Vertical Coupling ◽  
Spot Cooling

Three dimensional (3D) technologies with stacked chips have the potential to provide new chip architecture, improved device density, performance, efficiency, and bandwidth. Their increased power density also can become a daunting challenge for heat removal. Furthermore, power density can be highly non-uniform leading to time and space varying hotspots which can severely affect performance and reliability of the integrated circuits. Thus, it is important to mitigate thermal gradients on chip while considering the associated cooling costs. One method of thermal management currently under investigation is the use of superlattice thermoelectric coolers (TECs) which can be employed for on demand and localized cooling. In this paper, a detailed 3D thermal model of a stacked electronic package with two dies and four ultrathin integrated TECs is studied in order to investigate the efficacy of TECs in hot spot cooling for a 3D technology. We observe up to 14.6 °C of cooling at a hot spot inside the package by TECs. A strong vertical coupling has been observed between the TECs located in top and bottom dies. Bottom TECs can detrimentally heat the top hotspots in both steady state and transient operation. TECs need to be carefully placed inside the package to avoid such undesired heating. Thermal contact resistances between dies, inside the TEC module, and between the TEC and heat spreader are shown to have a crucial effect on TEC performance inside the package. We observed that square root current pulse can provide very efficient short-duration transient cooling at hotspots.

Experimental Analysis Model of an Active Cooling Method for 3D-ICs Utilizing Multidimensional Configured Thermoelectric Coolers

2010 ◽  
Vol 132 (2) ◽  
Author(s):  
Huy N. Phan ◽  
Dereje Agonafer
Keyword(s):  
Integrated Circuits ◽  
Thermal Management ◽  
Heat Dissipation ◽  
Three Dimensional ◽  
Analysis Model ◽  
Thermoelectric Coolers ◽  
Active Cooling ◽  
3D Ics ◽  
Cooling Method ◽  
Memory Applications

Presently, stack dice are used widely as low-power memory applications because thermal management of 3D architecture such as high-power processors inherits many thermal challenges. Inadequate thermal management of three-dimensional integrated circuits (3D-ICs) leads to reduction in performance, reliability, and ultimately system catastrophic failure. Heat dissipation of 3D systems is highly nonuniform and nonunidirectional due to many factors such as power architectures, transistors packing density, and real estate available on the chip. In this study, the development of an experimental model of an active cooling method to cool a 25 W stack-dice to approximately 13°C utilizing a multidimensional configured thermoelectric will be presented.

Study on the Preparation and Properties of PEG Phase Change Materials Fixed by Semi-IPN

2011 ◽  
Vol 299-300 ◽  
pp. 654-658
Author(s):  
Hong Zhang ◽  
Xiao Lei Wang ◽  
Qian Qian Wang
Keyword(s):  
Phase Change ◽  
Phase Change Material ◽  
Phase Change Materials ◽  
Three Dimensional ◽  
Molar Ratio ◽  
Good Thermal Stability ◽  
Dimensional Network ◽  
Mass Fractions ◽  
Optimum Formula ◽  
Change Material

Semi-IPN phase change material (PCM) which is suitable for the temperature adjustment textile field is prepared by solution copolymerization. The structure of framework material is a three-dimensional network prepared by N-hydroxymethyl acrylamide, and the phase change material is prepared by polyethylene glycol with molecular weigh 2000. The orthogonal experimental method is used for determining the optimum formula and investigating the various factors on the phase change material properties. Structure and properties of the composite properties are synthesized by SEM, DSC, TGA. The result shows: the advanced process of making composite phase change material is that PEG owns 70% of the overall mass fractions, initiator owns 2.5% of monomer mass fractions, the molar ratio of cross-linker monomer is 1:8, the reaction time is 3 hours, and mass ratio of monomer to water is 1:6. The prepared composite material is distributed uniformly of framework holes, and it has a well fixed effect to the phase change material, which the phase transition temperature is 32.92 °C, the enthalpy is up to 108.41 J / g. It also has a good thermal stability, and applies to the spinning environment which the temperature is not higher than 300 °C.

Properties and Reliability of Silicon Nitride Substrates with AMB Copper Conductor

2011 ◽  
Vol 2011 (1) ◽  
pp. 000777-000784 ◽  
Author(s):  
Böhm Gaby ◽  
Brunner Dieter ◽  
Sichert Ina ◽  
Pönicke Andreas ◽  
Schilm Jochen
Keyword(s):  
Thermal Conductivity ◽  
Silicon Nitride ◽  
Aluminum Nitride ◽  
Heat Dissipation ◽  
Bending Strength ◽  
Base Material ◽  
Ceramic Materials ◽  
Back Side ◽  
Copper Conductor ◽  
Adjacent Structures

This paper focuses on the properties of Si3N4 substrate material with AMB (active metal brazing) copper conductor. A recently developed type of tape casted, gas pressure sintered silicon nitride ceramic with a three times higher thermal conductivity than known from typical standard silicon nitride materials and with good flexural strength was applied. The increase of thermal conductivity is the result of using different species of sintering aids and the optimization of their ratio in the material. The high bending strength allows creating a thinner substrate compared to other standard ceramic materials for power electronics, e.g. aluminum nitride. This reduction in thickness leads to a decrease of the total thermal resistance of the substrate which improves heat dissipation. For the AMB process a silver based active brazing solder composition optimized for Silicon Nitride was used. This optimization could be obtained by an investigation of the physical and chemical interactions between the brazing and the base material. A void free joint without short circuits between adjacent structures could be formed. The copper surface can be coated on demand with Nickel or Nickel/Gold for improved solderability and wire bondability as well as for corrosion protection. The silicon nitride substrate with AMB copper conductor lines and fully covered back side ground shows a higher reliability than comparable substrates made out of common, well known ceramic materials. The heat dissipation is comparable with conventional AMB substrates made of high thermal conductive ceramic such as Aluminum Nitride, but thermal cycling behavior exceeds the limits well known from AlN-AMB or AlN-DCB.

A one-step-assembled three-dimensional network of silver/polyvinylpyrrolidone (PVP) nanowires and its application in energy storage

Nanoscale ◽  
2020 ◽  
Vol 12 (19) ◽  
pp. 10573-10583 ◽  
Author(s):  
Lin Zhang ◽  
Gang Feng
Keyword(s):  
Energy Storage ◽  
Hydrothermal Synthesis ◽  
Phase Change ◽  
Thermal Energy ◽  
Thermal Energy Storage ◽  
Phase Change Materials ◽  
Three Dimensional ◽  
Dimensional Network ◽  
One Step

Through a first-ever one-step hydrothermal synthesis, a silver–PVP-nanowire three-dimensional network is fabricated for drastically enhancing thermal energy storage phase change materials.

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