Design of Distribution Equipment Monitoring System Based on Internet of Things and Multi-Agent

In order to improve distribution equipment reliability and emergency repair response speed, a distribution equipment monitoring system based on Internet of things and multi-agent is designed by building a hierarchical model. The system is based on the power Internet of things, which is divided into sensing layer, device layer and data center layer. The sensing layer realizes multi-source data acquisition through sensors and acquisition devices; the device layer deploys edge computing agents to realize device-level monitoring; and the data center layer deploys coordinating agents to realize system-level analysis. The dual-way communication is used to realize data transmission between up layer and down layer. The system has the characteristics of distribution, autonomy and multi-objective interaction, which can meet and adapt to the demand and development trend of intelligent operation and maintenance of distribution equipment.

Dopingfree Schottky Buried Metal Layer Fully Depleted Planar FET for SCE Suppression at sub-28nm Technology Nodes

Herein we introduce and investigate a new architectural design strategy for planar single gate field effect transistors (SG-FETs) that delivers advantages from all fronts of design, fabrication and performance perspectives. The amalgamation of schottky buried metal layer (BML) and charge plasma (CP) mechanism of doping in planar single gate architecture yields a novel type of FET called as CP-BML FET. Owing to the schottky BML induced depletion region created on the bottom side of device layer reduces effective device layer thickness (T Si ) suppressing short channel effects (SCEs) including drain induced barrier lowering (DIBL) and threshold voltage roll-off. The proposed FET has been analyzed for DC and RF performance figure of merits (FOMs) and compared to counterpart state of the art technologies with reference to ITRS performance projections. The proposed FET is also investigated the performance FOMs on for criticality of physical param- eters including gate length (Lg), device layer thickness (T Si ), BML workfunction (Φ BML ). The ION and IOFF for proposed device at Lg = 20nm read at 730 µA/µm and 7x10 - 2 pA/µm respectively. RF performance anal- ysis reveal transition frequency (ft) of 390 GHz with SS ' 75mV=dec coherent with ITRS performance pro- jections. It is found that ultra scaled (7 nm) proposed device exhibits intrinsic delay Ƭof 0.6 ps which is supe- rior to ITRS projections of 1.71 ps at 28 nm technology node. The proposed device yields P dyn of 0.248 fJ/µm at Lg=7nm implicating it to be potential candidate for low power with high performance application requirements.

Cavity-BOX SOI: Advanced Silicon Substrate with Pre-Patterned BOX for Monolithic MEMS Fabrication

Several Silicon on Insulator (SOI) wafer manufacturers are now offering products with customer-defined cavities etched in the handle wafer, which significantly simplifies the fabrication of MEMS devices such as pressure sensors. This paper presents a novel cavity buried oxide (BOX) SOI substrate (cavity-BOX) that contains a patterned BOX layer. The patterned BOX can form a buried microchannels network, or serve as a stop layer and a buried hard-etch mask, to accurately pattern the device layer while etching it from the backside of the wafer using the cleanroom microfabrication compatible tools and methods. The use of the cavity-BOX as a buried hard-etch mask is demonstrated by applying it for the fabrication of a deep brain stimulation (DBS) demonstrator. The demonstrator consists of a large flexible area and precisely defined 80 µm-thick silicon islands wrapped into a 1.4 mm diameter cylinder. With cavity-BOX, the process of thinning and separating the silicon islands was largely simplified and became more robust. This test case illustrates how cavity-BOX wafers can advance the fabrication of various MEMS devices, especially those with complex geometry and added functionality, by enabling more design freedom and easing the optimization of the fabrication process.

Strong and tunable spin–orbit interaction in a single crystalline InSb nanosheet

A dual-gate InSb nanosheet field-effect device is realized and is used to investigate the physical origin and the controllability of the spin–orbit interaction in a narrow bandgap semiconductor InSb nanosheet. We demonstrate that by applying a voltage over the dual gate, efficiently tuning of the spin–orbit interaction in the InSb nanosheet can be achieved. We also find the presence of an intrinsic spin–orbit interaction in the InSb nanosheet at zero dual-gate voltage and identify its physical origin as a build-in asymmetry in the device layer structure. Having a strong and controllable spin–orbit interaction in an InSb nanosheet could simplify the design and realization of spintronic deceives, spin-based quantum devices, and topological quantum devices.

Laser Ablation for Throughput Increase in Large Volume Semiconductor Failure Analysis Tasks

As the semiconductor industry demands higher throughput for failure analysis, there is a constant need to rapidly speed up the sample preparation workflows. Here we present extended capabilities of the standard Xe plasma Focused Ion Beam failure analysis workflows by implementing a standalone laser ablation tool. Time-to-sample advantages of such workflow is shown on four distinct applications: cross-sectioning of a large solder ball, cross-sectioning of a deeply buried wire bond, cross-sectioning of the device layer of an OLED display, and removing the MEMS silicon cap to access underlying structures. In all of these workflows we have shown significant decrease in required process time while altogether avoiding the disadvantages of corresponding mechanical and chemical methods.

Obstacle aware delay optimized rectilinear steiner minimum tree routing

<p><span>This work presents a method to solve the problem of constructing Rectilinear Steiner Minimum Tree (RSMT) for a group of pins in the presence of obstacles. In modern </span><span>very large-scale integrated circuit</span><span> (VLSI) designs, the obstacles, generally blocks the metal and the device layer. Therefore routing on top of blockage is a possible solution but buffers cannot be placed over the obstacle. Modern VLSI design OARSMT construction has long wire length, which results in signal violation. To address this issue a slew constraint interconnect need to be considered in routing over obstacle. This is called the Obstacle-Avoiding Rectilinear Steiner minimum trees (OARSMT) problem with slew constraints over obstacles. The drawback of traditional OARSMT is that they only consider slew constraint, and delay constraints are neglected. It induces high routing resources overhead due to buffer insertion and does not solve global routing solution. This work presents an Obstacle Aware Delay Optimized Rectilinear Steiner Minimum Tree (OADORSMT) Routing to address the delay, slew constraint and reduce the routing resources. Experiments are conduced to evaluate the performance of proposed approach over existing approach in term of wire length and worst negative slack. The experiments are conducted for small and large nets considering fixed and varied obstacles and outcome shows the proposed efficiency over existing approaches. The OADORSMT is designed in such a way where it can be parallelized to obtain better efficiency.</span></p>

Two-dimensional photonic crystals for engineering atom–light interactions

We present a 2D photonic crystal system for interacting with cold cesium (Cs) atoms. The band structures of the 2D photonic crystals are predicted to produce unconventional atom–light interaction behaviors, including anisotropic emission, suppressed spontaneous decay, and photon-mediated atom–atom interactions controlled by the position of the atomic array relative to the photonic crystal. An optical conveyor technique is presented for continuously loading atoms into the desired trapping positions with optimal coupling to the photonic crystal. The device configuration also enables application of optical tweezers for controlled placement of atoms. Devices can be fabricated reliably from a 200-nm silicon nitride device layer using a lithography-based process, producing predicted optical properties in transmission and reflection measurements. These 2D photonic crystal devices can be readily deployed to experiments for many-body physics with neutral atoms and engineering of exotic quantum matter.