Synaptic Transistors Exhibiting Gate-Pulse-Driven, Metal-Semiconductor Transition of Conduction

Neuromorphic devices have been investigated extensively for technological breakthroughs that could eventually replace conventional semiconductor devices. In contrast to other neuromorphic devices, the device proposed in this paper utilizes deep trap interfaces between the channel layer and the charge-inducing dielectrics (CID). The device was fabricated using in-situ atomic layer deposition (ALD) for the sequential deposition of the CID and oxide semiconductors. Upon the application of a gate bias pulse, an abrupt change in conducting states was observed in the device from the semiconductor to the metal. Additionally, numerous intermediate states could be implemented based on the number of cycles. Furthermore, each state persisted for 10,000 s after the gate pulses were removed, demonstrating excellent synaptic properties of the long-term memory. Moreover, the variation of drain current with cycle number demonstrates the device’s excellent linearity and symmetry for excitatory and inhibitory behaviors when prepared on a glass substrate intended for transparent devices. The results, therefore, suggest that such unique synaptic devices with extremely stable and superior properties could replace conventional semiconducting devices in the future.

Effect of Energy and Temperature on Tetrahedral Amorphous Carbon Coatings Deposited by Filtered Laser-Arc

In this study, both the plasma process of filtered laser-arc evaporation and the resulting properties of tetrahedral amorphous carbon coatings are investigated. The energy distribution of the plasma species and the arc spot dynamics during the arc evaporation are described. Different ta-C coatings are synthesized by varying the bias pulse time and temperature during deposition. An increase in hardness was observed with the increased overlapping of the bias and arc pulse times. External heating resulted in a significant loss of hardness. A strong discrepancy between the in-plane properties and the properties in the film normal direction was detected specifically for a medium temperature of 120 °C during deposition. Investigations using electron microscopy revealed that this strong anisotropy can be explained by the formation of nanocrystalline graphite areas and their orientation toward the film’s normal direction. This novel coating type differs from standard amorphous a-C and ta-C coatings and offers new possibilities for superior mechanical behavior due to its combination of a high hardness and low in-plane Young’s Modulus.

Voltage-Polarity Dependent Programming Behaviors of Amorphous In–Ga–Zn–O Thin-Film Transistor Memory with an Atomic-Layer-Deposited ZnO Charge Trapping Layer

Amorphous In–Ga–Zn-O (a-IGZO) thin-film transistor (TFT) memories are attracting many interests for future system-on-panel applications; however, they usually exhibit a poor erasing efficiency. In this article, we investigate voltage-polarity-dependent programming behaviors of an a-IGZO TFT memory with an atomic-layer-deposited ZnO charge trapping layer (CTL). The pristine devices demonstrate electrically programmable characteristics not only under positive gate biases but also under negative gate biases. In particular, the latter can generate a much higher programming efficiency than the former. Upon applying a gate bias pulse of +13 V/1 μs, the device shows a threshold voltage shift (ΔVth) of 2 V; and the ΔVth is as large as −6.5 V for a gate bias pulse of −13 V/1 μs. In the case of 12 V/1 ms programming (P) and −12 V/10 μs erasing (E), a memory window as large as 7.2 V can be achieved at 103 of P/E cycles. By comparing the ZnO CTLs annealed in O2 or N2 with the as-deposited one, it is concluded that the oxygen vacancy (VO)-related defects dominate the bipolar programming characteristics of the TFT memory devices. For programming at positive gate voltage, electrons are injected from the IGZO channel into the ZnO layer and preferentially trapped at deep levels of singly ionized oxygen vacancy (VO+) and doubly ionized oxygen vacancy (VO2+). Regarding programming at negative gate voltage, electrons are de-trapped easily from neutral oxygen vacancies because of shallow donors and tunnel back to the channel. This thus leads to highly efficient erasing by the formation of additional ionized oxygen vacancies with positive charges.

Выявление пространственного и квантового ограничения Si-наночастиц, нанесенных методом лазерного электродиспергирования на кристаллический Si

C – V characteristics and DLTS spectra of heterostructures made up of layers of closely packed amorphous Si nanoparticles deposited by laser electrodispersion onto single-crystal p -Si substrates have been examined. The patterns observed in the behavior of the C – V characteristics and DLTS spectra measured in the dark and under illumination with white light at various bias pulse voltages U _ b and filling pulse voltages U _ f suggest that the spatially localized amorphous Si nanoparticles have an average size of less than 2 nm, which is comparable with the de Broglie electron wavelength, and are characterized by quantum confinement. The ground and excited states of quantum dots are formed and exhibit the Stark effect and effects of electricdipole and controllable metastable occupancy under illumination.