Closed-Loop Temperature Control CMOS Integrated Circuit for Diagnostics and Self-calibration of Capacitive Humidity Sensors

2019 ◽  
pp. 489-495
Author(s):  
Moataz Elkhayat ◽  
Stefano Mangiarotti ◽  
Marco Grassi ◽  
Piero Malcovati
Keyword(s):  
Temperature Control ◽  
Integrated Circuit ◽  
Closed Loop ◽  
Humidity Sensors ◽  
Cmos Integrated Circuit ◽  
Self Calibration

Comparison of Dc-Dc SEPIC, CUK and Flyback Converters Based LED Drivers

2020 ◽  
pp. 99-107
Author(s):  
Erdal Sehirli
Keyword(s):  
Integrated Circuit ◽  
Closed Loop ◽  
Input Voltage ◽  
Open Loop ◽  
Current Sensor ◽  
Switching Frequency ◽  
Led Driver ◽  
Advantages And Disadvantages ◽  
Led Drivers ◽  
Conduction Mode

This paper presents the comparison of LED driver topologies that include SEPIC, CUK and FLYBACK DC-DC converters. Both topologies are designed for 8W power and operated in discontinuous conduction mode (DCM) with 88 kHz switching frequency. Furthermore, inductors of SEPIC and CUK converters are wounded as coupled. Applications are realized by using SG3524 integrated circuit for open loop and PIC16F877 microcontroller for closed loop. Besides, ACS712 current sensor used to limit maximum LED current for closed loop applications. Finally, SEPIC, CUK and FLYBACK DC-DC LED drivers are compared with respect to LED current, LED voltage, input voltage and current. Also, advantages and disadvantages of all topologies are concluded.

Experimental Implementation of Networked Chaotic Oscillators Based on Cross-Coupled Inverter Rings in a CMOS Integrated Circuit

2015 ◽  
Vol 24 (09) ◽  
pp. 1550144 ◽  
Author(s):  
Ludovico Minati
Keyword(s):  
Experimental Data ◽  
Integrated Circuit ◽  
Phase Synchronization ◽  
Random Number Generation ◽  
Partial Amplitude ◽  
Chaotic Oscillator ◽  
Chaotic Oscillators ◽  
Cmos Integrated Circuit ◽  
Experimental Implementation ◽  
Small Clusters

A novel chaotic oscillator based on "cross-coupled" inverter rings is presented. The oscillator consists of a 3-ring to which higher odd n-rings are progressively coupled via diodes and pass gates; it does not contain reactive or resistive elements, and is thus suitable for area-efficient implementation on a CMOS integrated circuit. Numerical simulation based on piece-wise linear approximation predicted the generation of positive spikes having approximately constant periodicity but highly variable cycle amplitude. Simulation Program with Integrated Circuit Emphasis (SPICE) simulations and experimental data from a prototype realized on 0.7 μm technology confirmed this finding, and demonstrated increasing correlation dimension (D2) as 5-, 7- and 9-rings were progressively coupled to the 3-ring. Experimental data from a ring of 24 such oscillator cells showed phase synchronization and partial amplitude synchronization (formation of small clusters), emerging depending on DC gate voltage applied at NMOS transistors implementing diffusive coupling between neighboring cells. Thanks to its small area, simple synchronizability and digital controllability, the proposed circuit enables experimental investigation of dynamical complexity in large networks of coupled chaotic oscillators, and may additionally be suitable for applications such as broadband signal and random number generation.

CMOS Circuits on Silicon Carbide for High Temperature Operation

2014 ◽  
Vol 1693 ◽  
Author(s):  
David T. Clark ◽  
Robin F. Thompson ◽  
Aled E. Murphy ◽  
David A. Smith ◽  
Ewan P. Ramsay ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Wide Temperature Range ◽  
Integrated Circuit ◽  
Elevated Temperatures ◽  
Logic Circuits ◽  
Digital Logic ◽  
Cmos Integrated Circuit ◽  
Temperature Range ◽  
Simple Logic

ABSTRACTWe present the characteristics of a high temperature CMOS integrated circuit process based on 4H silicon carbide designed to operate at temperatures beyond 300°C. N-channel and P-channel transistor characteristics at room and elevated temperatures are presented. Both channel types show the expected low values of field effect mobility well known in SiC MOSFETS. However the performance achieved is easily capable of exploitation in CMOS digital logic circuits and certain analogue circuits, over a wide temperature range.Data is also presented for the performance of digital logic demonstrator circuits, in particular a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. Devices are packaged in high temperature ceramic dual in line (DIL) packages, which are capable of greater than 300°C operation. A high temperature “micro-oven” system has been designed and built to enable testing and stressing of units assembled in these package types. This system heats a group of devices together to temperatures of up to 300°C while keeping the electrical connections at much lower temperatures. In addition, long term reliability data for some structures such as contact chains to n-type and p-type SiC and simple logic circuits is summarized.

Paper-based resistive heater with accurate closed-loop temperature control for microfluidics paper-based analytical devices

2018 ◽  
Vol 24 (9) ◽  
pp. 3915-3924 ◽  
Author(s):  
Saeed Atabakhsh ◽  
Zahra Latifi Namin ◽  
Shahin Jafarabadi Ashtiani
Keyword(s):  
Temperature Control ◽  
Closed Loop ◽  
Resistive Heater

System-on-Chip Integrated MEMS Packages for RF LNA Testing and Self-Calibration

2011 ◽  
Vol 8 (4) ◽  
pp. 154-163
Author(s):  
Bruce C. Kim ◽  
Sukeshwar Kannan ◽  
Sai Shravan Evana ◽  
Seok-Ho Noh
Keyword(s):  
Test Stimulus ◽  
Integrated Circuit ◽  
Communication Systems ◽  
Additive White Gaussian Noise ◽  
Test Technique ◽  
Mems Switches ◽  
Self Calibration ◽  
Look Up Table ◽  
The Look ◽  
Rf Circuit

In this paper, we present MEMS-enhanced integrated package design which provides the capability to self-test and self-calibrate integrated circuit chips. We have developed a novel test technique where the test stimulus is generated by modulating the RF carrier signal with another signal mixed with additive white Gaussian noise. This novel test stimulus is provided as the input to the RF circuit and the peak-to-average ratio (PAR) is measured at the output. Simulations were carried out for fault-free and fault-induced circuit conditions, and their corresponding PARs were stored in the look-up table (LUT). Test simulations were performed and the results were compared with the look-up table to verify whether the device is fault-free. In faulty circuit conditions, calibration was performed using a tuning circuit made of MEMS switches. The entire validation of the design using the test technique and self-calibration of the RF circuit was automated using the calibration algorithm. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.

scholarly journals PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors

Electronics ◽  
2018 ◽  
Vol 7 (10) ◽  
pp. 252 ◽  
Author(s):  
Victor Carbajal-Gomez ◽  
Esteban Tlelo-Cuautle ◽  
Carlos Sanchez-Lopez ◽  
Francisco Fernandez-Fernandez
Keyword(s):  
Integrated Circuit ◽  
Secure Communication ◽  
Piecewise Linear ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Chaotic Attractors ◽  
Chaotic Oscillator ◽  
Maximum Lyapunov Exponent ◽  
Chaotic Oscillators ◽  
Cmos Integrated Circuit

Designing chaotic oscillators using complementary metal-oxide-semiconductor (CMOS) integrated circuit technology for generating multi-scroll attractors has been a challenge. That way, we introduce a current-mode piecewise-linear (PWL) function based on CMOS cells that allow programmable generation of 2–7-scroll chaotic attractors. The mathematical model of the chaotic oscillator designed herein has four coefficients and a PWL function, which can be varied to provide a high value of the maximum Lyapunov exponent. The coefficients are implemented electronically by designing operational transconductance amplifiers that allow programmability of their transconductances. Design simulations of the chaotic oscillator are provided for the 0.35 μ m CMOS technology. Post-layout and process–voltage–temperature (PVT) variation simulations demonstrate robustness of the multi-scroll chaotic attractors. Finally, we highlight the synchronization of two seven-scroll attractors in a master–slave topology by generalized Hamiltonian forms and observer approach. Simulation results show that the synchronized CMOS chaotic oscillators are robust to PVT variations and are suitable for chaotic secure communication applications.

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