A 77-GHz antenna and fully integrated radar transceiver in package

2012 ◽  
Vol 4 (4) ◽  
pp. 447-453 ◽  
Author(s):  
A. Fischer ◽  
A. Stelzer ◽  
L. Maurer

A 77-GHz–directional folded dipole antenna integrated in an embedded wafer level ball grid array package is presented. For the characterization of the antenna, a frequency multiplier is embedded, which scales the 4.25-GHz input signal up to 76.5 GHz and allows the use of a commercial signal source. The antenna structure is manufactured at the metallic layer, in the fan-out area of the package, and is directly connected to the monolithically integrated transceiver. The gain of the antenna is about 7 dBi, measured over a large bandwidth of about 8 GHz. The combination of the frequency multiplier with a 77-GHz transceiver and the on-package antenna is a promising approach for a system-in-package to future radar modules for automotive radar applications. Such a module avoids 77-GHz transitions to the printed circuit board and hence simplifies the design and manufacturing of the radar sensor significantly.

Author(s):  
M. Niessner ◽  
G. Haubner ◽  
W. Hartner ◽  
S. Pahlke

A DfR (Design for Reliability) approach which is systematically based on simulation, sensitivity analysis and experimental validation is applied for identifying, understanding and controlling the key factors which determine the solder joint reliability of eWLB (Embedded Wafer Level Ball Grid Array) packages that carry embedded 77 GHz dies and sit on hybrid PCB (Printed Circuit Board) stacks. The hybrid stack investigated in this work is characteristic to automotive RADAR (Radio Detection And Ranging) applications and consists of one low-loss RF (Radio Frequency) layer and several FR4 layers. In line with previous work [1], the mechanical material properties of the low-loss RF laminate material are found to be the key factor. Simulation is used to systematically screen for mechanical properties which are favorable for achieving a high solder joint reliability on the unconstrained PCBs used for standardized solder joint reliability testing. A simplified virtual assessment of PCBs constrained by the mounting in system module housings is done. Both simulation and experimental results show that RF laminate materials with low Young’s modulus are the class of materials which allows for the highest solder joint reliability for all the conditions investigated in this study.


2009 ◽  
Vol 1 (6) ◽  
pp. 529-536
Author(s):  
Yenny Pinto ◽  
Christian Person ◽  
Daniel Gloria ◽  
Andreia Cathelin ◽  
Didier Belot ◽  
...  

This paper describes the analysis and the design of an integrated antenna on 0.13 µm SiGe BICMOS technology. A non-resonant dipole antenna integrated on SiGe is electromagnetically coupled to a radiating element reported on a printed circuit board (PCB) substrate. This integrated solution, also compatible with system in package (SIP) concept, provides significant improvements with respect to direct System On Chip (SoC) integration. The main objective of this SIP antenna lies on the optimization of integrated millimeter wave front-ends modules, considering the immediate antenna environment (especially the lossy substrate and technological dielectric/metallic levels), in order to achieve performances compatible with short range radar specifications at 79–81 GHz. One solution, using a RT/Rogers Duroid 6006 PCB (er = 6, thickness h = 127 µm), is presented, providing a 2.93 dBi gain, and 45% radiation efficiency antenna.


Author(s):  
Philipp Ritter

Abstract Next-generation automotive radar sensors are increasingly becoming sensitive to cost and size, which will leverage monolithically integrated radar system-on-Chips (SoC). This article discusses the challenges and the opportunities of the integration of the millimeter-wave frontend along with the digital backend. A 76–81 GHz radar SoC is presented as an evaluation vehicle for an automotive, fully depleted silicon-over-insulator 22 nm CMOS technology. It features a digitally controlled oscillator, 2-millimeter-wave transmit channels and receive channels, an analog base-band with analog-to-digital conversion as well as a digital signal processing unit with on-chip memory. The radar SoC evaluation chip is packaged and flip-chip mounted to a high frequency printed circuit board for functional demonstration and performance evaluation.


2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.


2017 ◽  
Vol 2017 (1) ◽  
pp. 000325-000330 ◽  
Author(s):  
Wei Zhao ◽  
Mark Nakamoto ◽  
Karthikeyan Dhandapani ◽  
Brian Henderson ◽  
Ron Lindley ◽  
...  

Abstract Electrical Chip Board Interaction (e-CBI) has emerged as a new risk in chip design as silicon die can directly interact with printed circuit board (PCB) in substrate-less wafer level packaging technology. To assess this risk Qualcomm Technologies, Inc. has converted an existing test chip to wafer level packaging technology. Both the measured data and simulation results show that e-CBI risk is significant and must be carefully managed.


2013 ◽  
Vol 427-429 ◽  
pp. 1293-1296
Author(s):  
Yan Zhong Yu ◽  
Ji Zhen Ni ◽  
Xian Hui Li

A printed inverted-F antenna for RFID tag at 5.8 GHz is designed in this paper. The antenna structure consists of an inverted-F patch, a substrate layer, and a ground plane. To reduce costs, the FR4 is selected as the material of substrate layer, which is used commonly in PCB (Printed Circuit Board). Its relative permittivity is 4.4 and a loss tangent is 0.02. The inverted-F patch and ground plane are laid on/under the substrate layer respectively. The designed antenna is modeled, simulated and optimized by using HFSS (high frequency electromagnetic simulation software). Simulation results demonstrate that the printed inverted-F antenna can satisfy the requirements of RFID Tag applications.


2019 ◽  
Vol 11 (10) ◽  
pp. 1061-1068
Author(s):  
Osama Khan ◽  
Johannes Meyer ◽  
Klaus Baur ◽  
Saeed Arafat ◽  
Christian Waldschmidt

AbstractA hybrid thin film multilayer antenna for automotive radar is presented in this work. A 2 × 8 aperture coupled stacked patch antenna array is realized on a single layer printed circuit board (PCB) using a novel thin film-based approach. Using a compact 180° phase difference power divider, inter-element spacing in a 2×2 sub-array is reduced. Measurement results show a 19% (67.9–82.5 GHz) impedance bandwidth and a wideband broadside radiation pattern, with a maximum gain of 15.4 dBi realized gain at 72 GHz. The presented antenna compares favorably with other multilayer PCB antennas in terms of performance, with the advantage of simpler manufacturing and robust design. The antenna can be employed in mid-range automotive radar applications.


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