A Power Reduction Method for Scan Testing in Ultra-Low Power Designs

2021 ◽  
Author(s):  
Hiroyuki Iwata ◽  
Yoichi Maeda ◽  
Jun Matsushima
Keyword(s):  
Low Power ◽  
Reduction Method ◽  
Power Reduction ◽  
Ultra Low Power ◽  
Scan Testing

scholarly journals Low-Power RTL Code Generation for Advanced CNN Algorithms toward Object Detection in Autonomous Vehicles

Electronics ◽  
2020 ◽  
Vol 9 (3) ◽  
pp. 478
Author(s):  
Youngbae Kim ◽  
Heekyung Kim ◽  
Nandakishor Yadav ◽  
Shuai Li ◽  
Kyuwon Ken Choi
Keyword(s):  
Low Power ◽  
Object Detection ◽  
Power Dissipation ◽  
Detection System ◽  
Data Access ◽  
Power Reduction ◽  
Design Flow ◽  
Ultra Low Power ◽  
Dynamic Power ◽  
Asic Design

In the implementation process of a convolution neural network (CNN)-based object detection system, the primary issues are power dissipation and limited throughput. Even though we utilize ultra-low power dissipation devices, the dynamic power dissipation issue will be difficult to resolve. During the operation of the CNN algorithm, there are several factors such as the heating problem generated from the massive computational complexity, the bottleneck generated in data transformation and by the limited bandwidth, and the power dissipation generated from redundant data access. This article proposes the low-power techniques, applies them to the CNN accelerator on the FPGA and ASIC design flow, and evaluates them on the Xilinx ZCU-102 FPGA SoC hardware platform and 45 nm technology for ASIC, respectively. Our proposed low-power techniques are applied at the register-transfer-level (RT-level), targeting FPGA and ASIC. In this article, we achieve up to a 53.21% power reduction in the ASIC implementation and saved 32.72% of the dynamic power dissipation in the FPGA implementation. This shows that our RTL low-power schemes have a powerful possibility of dynamic power reduction when applied to the FPGA design flow and ASIC design flow for the implementation of the CNN-based object detection system.

scholarly journals Energy Efficiency of Ultra-Low-Power Bicycle Wireless Sensor Networks Based on a Combination of Power Reduction Techniques

2016 ◽  
Vol 2016 ◽  
pp. 1-21 ◽  
Author(s):  
Sadik Kamel Gharghan ◽  
Rosdiadee Nordin ◽  
Mahamod Ismail
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Level ◽  
Mobile Node ◽  
Data Rate ◽  
Power Reduction ◽  
Sensor Nodes ◽  
Wireless Sensor ◽  
Ultra Low Power ◽  
Hybrid Particle Swarm Optimization

In most wireless sensor network (WSN) applications, the sensor nodes (SNs) are battery powered and the amount of energy consumed by the nodes in the network determines the network lifespan. For future Internet of Things (IoT) applications, reducing energy consumption of SNs has become mandatory. In this paper, an ultra-low-power nRF24L01 wireless protocol is considered for a bicycle WSN. The power consumption of the mobile node on the cycle track was modified by combining adjustable data rate, sleep/wake, and transmission power control (TPC) based on two algorithms. The first algorithm was a TPC-based distance estimation, which adopted a novel hybrid particle swarm optimization-artificial neural network (PSO-ANN) using the received signal strength indicator (RSSI), while the second algorithm was a novel TPC-based accelerometer using inclination angle of the bicycle on the cycle track. Based on the second algorithm, the power consumption of the mobile and master nodes can be improved compared with the first algorithm and constant transmitted power level. In addition, an analytical model is derived to correlate the power consumption and data rate of the mobile node. The results indicate that the power savings based on the two algorithms outperformed the conventional operation (i.e., without power reduction algorithm) by 78%.

An Ultra-low Power Consumption MAC Protocol Complied with IEEE 802.15.4/4e for Wireless Smart Utility Networks

2016 ◽  
Vol 136 (11) ◽  
pp. 1555-1566 ◽  
Author(s):  
Jun Fujiwara ◽  
Hiroshi Harada ◽  
Takuya Kawata ◽  
Kentaro Sakamoto ◽  
Sota Tsuchiya ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Ieee 802.15.4 ◽  
Mac Protocol ◽  
Low Power Consumption ◽  
Ultra Low Power

An Ultra Low Power and Variation Tolerant GEN2 RFID Tag Front-End with Novel Clock-Free Decoder

2010 ◽  
Vol E93-C (6) ◽  
pp. 785-795
Author(s):  
Sung-Jin KIM ◽  
Minchang CHO ◽  
SeongHwan CHO
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Rfid Tag ◽  
Front End
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