Spacer Effects on the Circuit Performance of DG Junctionless Transistor

Author(s):  
Adhithan Pon ◽  
M. Madheswaran ◽  
A. Santhia Carmel ◽  
A. Bhattacharyya ◽  
R. Ramesh
Author(s):  
Rhushikesh K. Joshi ◽  
T. V. Arjun ◽  
S. Ahish ◽  
Dheeraj Sharma ◽  
M. H. Vasantha ◽  
...  

2010 ◽  
Vol E93-C (6) ◽  
pp. 893-904
Author(s):  
Jin SUN ◽  
Kiran POTLURI ◽  
Janet M. WANG

Author(s):  
Nik Ahmad Zainal Abidin ◽  
◽  
Norkharziana Mohd Nayan ◽  
Azuwa Ali ◽  
N. A. Azli ◽  
...  

This research presents a simulation analysis for the AC-DC converter circuit with a different configurations of the array connection of the piezoelectric sensor. The selection of AC-DC converter circuits is full wave bridge rectifier (FWBR), parallel SSHI (P-SSHI) and parallel voltage multiplier (PVM) with array configuration variation in series (S), parallel (P), series-parallel (SP) and parallel-series (PS). The system optimizes with different load configurations ranging from 10 kΩ to 1 MΩ. The best configuration of AC-DC converter with an appropriate array piezoelectric connection producing the optimum output of harvested power is presented. According to the simulation results, the harvested power produced by using P-SSHI converter connected with 3 parallel piezoelectric transducer array was 85.9% higher than for PVM and 15.88% higher than FWBR.


Author(s):  
Pei Y. Tsai ◽  
Junedong Lee ◽  
Paul Ronsheim ◽  
Lindsay Burns ◽  
Richard Murphy ◽  
...  

Abstract A stringent sampling plan is developed to monitor and improve the quality of 300mm SOI (silicon on insulator) starting wafers procured from the suppliers. The ultimate goal is to obtain the defect free wafers for device fabrication and increase yield and circuit performance of the semiconductor integrated circuits. This paper presents various characterization techniques for QC monitor and examples of the typical defects attributed to wafer manufacturing processes.


1993 ◽  
Vol 29 (8) ◽  
pp. 726
Author(s):  
H.-G. Yang ◽  
P. Migliorato ◽  
C. Reita ◽  
S. Fluxman

1995 ◽  
Vol 31 (22) ◽  
pp. 1918-1919
Author(s):  
P.J. Mather ◽  
P. Hallam ◽  
M. Brouwer

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 330
Author(s):  
Georges Pananakakis ◽  
Gérard Ghibaudo ◽  
Sorin Cristoloveanu

Under several circumstances, a nanowire transistor with a square cross-section behaves as a circular. Taking the Gate-All-Around junctionless transistor as a primary example, we investigate the transition of the conductive region from square to circle-like. In this case, the metamorphosis is accentuated by smaller size, lower doping, and higher gate voltage. After defining the geometrical criterion for square-to-circle shift, simulation results are used to document the main consequences. This transition occurs naturally in nanowires thinner than 50 nm. The results are rather universal, and supportive evidence is gathered from inversion-mode Gate-All-Around (GAA) MOSFETs as well as from thermal diffusion process.


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