A study on Silicon Carbide (SiC) wafer using ion implantation

Author(s):  
Weijiang Zhao ◽  
Kazuki Tobikawa ◽  
Tsutomu Nagayama ◽  
Shigeki Sakai
2014 ◽  
Vol 778-780 ◽  
pp. 677-680 ◽  
Author(s):  
Takenori Fujiwara ◽  
Yugo Tanigaki ◽  
Yukihiro Furukawa ◽  
Kazuhiro Tonari ◽  
Akihiro Otsuki ◽  
...  

Cost of silicon carbide (SiC) wafer has been improved owing to the development of larger and higher quality wafer technologies, while the process stays long and complicated. In this paper, we propose a novel short process of ion implantation and provide the fabrication model SiC schottky barrier diodes (SiC-SBDs) devices. Currently common mask layer of ion implantation employs high heat resistant materials such as metal oxides. Because the ion is implanted to SiC wafer at high temperature between 300 °C and 800 °C due to avoid the damage of SiC crystal structure. The process using oxide layer tends to became long and complicated. On the other hand, our proposal process uses a heat resistant photoresist material as the mask instead of the oxide layer. The heat resistant photoresist is applied to newly developed SP-D1000 produced by Toray Industries, Inc.. We demonstrated to fabricate model SiC-SBDs devices based on our proposal process with SP-D1000 and confirmed the device working as same as a current process.


2018 ◽  
Vol 924 ◽  
pp. 345-348
Author(s):  
Norihito Yabuki ◽  
Satoshi Torimi ◽  
Satoru Nogami ◽  
Makoto Kitabatake ◽  
Tadaaki Kaneko

We propose the Si-vapor ambient anneal as a cap-free activation annealing (A/A) method for Silicon Carbide (SiC) using Tantalum Carbide / Tantalum composite materials (TaC/Ta). This method prevents the roughening of SiC surface by controlling the process function without conventional Carbon (C)-cap [1,2]. In this report, we evaluated the warping behavior of SiC wafer to confirm the effect of ion implantation (I/I) temperature (TI/I) and epi-ready treatment using Si-vapor ambient anneal. Wafer warp suppressing effect of high temperature I/I was confirmed and large wafer warpage occurred due to thinning of the wafer thickness. Furthermore we also observed the simultaneous improvement of the sharp edge shape and sidewall roughness of the trench under the appropriate conditions of the Si-vapor ambient anneal. It is possible to shape the round shape of the trench edge and to improve the roughness of trench sidewall by Si-vapor ambient anneal simultaneously with activation annealing process.


Author(s):  
Zhenghua An ◽  
Ricky K. Y. Fu ◽  
Peng Chen ◽  
Weili Liu ◽  
Paul K. Chu ◽  
...  

2001 ◽  
Vol 353-356 ◽  
pp. 549-554 ◽  
Author(s):  
Bengt Gunnar Svensson ◽  
Anders Hallén ◽  
Margareta K. Linnarsson ◽  
Andrej Yu. Kuznetsov ◽  
Martin S. Janson ◽  
...  

2021 ◽  
Author(s):  
Yexin Fan ◽  
ying song ◽  
zongwei xu ◽  
jintong wu ◽  
rui zhu ◽  
...  

Abstract Molecular dynamics (MD) simulation is adopted to discover the underlying mechanism of silicon vacancy color center and damage evolution during helium ions implanted four-hexagonal silicon carbide (4H-SiC) and subsequent annealing. The atomic-scale mechanism of silicon vacancy color centers in the process of He ion implantation into 4H-SiC can be described more accurately by incorporating electron stopping power for He ion implantation. We present a new method for calculating the silicon vacancy color center numerically, which considers the structure around the color center and makes the statistical results more accurate than the Wigner-Seitz defect analysis method. At the same time, photoluminescence (PL) spectroscopy of silicon vacancy color center under different helium ion doses is also characterized for validating the numerical analysis. The MD simulation of the optimal annealing temperature of silicon vacancy color center is predicted by the proposed new method.


2014 ◽  
Vol 69 (8) ◽  
Author(s):  
Mohd Nor Fakhzan Mohd Kazim ◽  
Selvanayakan Raman ◽  
Muhammad Hafiz Shafie ◽  
Nashrul Fazli Mohd Nasir ◽  
Asan Gani Abdul Muthalif

Silicon carbide (SiC) is a material that possesses hardness and robustness to operate under high temperature condition. This work is a pilot in exploring the feasibility of cubic piezo element on the SiC wafer with integrated proof mass as horizontal cantilever with perpendicular displacement with respect to the normal plane. With the advance of electronic circuitry, the power consumption is reduced to nano-watts. Therefore, harvesting ambient energy and converting into electrical energy through piezoelectric material will be useful for powering low power devices. Resonance is a property which able to optimize the generated output power by tuning the proof masses. The damping ratio is a considerable parameter for optimization. From analytical study, small damping ratio will enhance the output power of the piezoelectric energy harvester (PEH). This paper will present mathematical modelling approach, simulation verification and the conditional circuit named versatile precision full wave rectifier.  


2017 ◽  
Vol 897 ◽  
pp. 375-378 ◽  
Author(s):  
Satoshi Torimi ◽  
Koji Ashida ◽  
Norihito Yabuki ◽  
Masato Shinohara ◽  
Takuya Sakaguchi ◽  
...  

As a new thinning and surface planarizing process of Silicon Carbide (SiC) wafer, we propose the completely thermal-chemical etching process; Si-vapor etching (Si-VE) technology. In this work, the effects of mechanical strength and surface step-terrace structure by Si-VE are investigated on the 4° off-axis 4H-SiC (0001) Si-face substrates. The indentation hardness of Si-VE surface is superior to the conventional chemo-mechanical polishing (CMP) surface even after epitaxial growth. The transverse strength of thinned Si-VE substrate is also superior to the conventional mechanically ground substrate. The surface step-terrace structures are observed by the low energy electron channeling contrast (LE-ECC) imaging technique. The latent scratch causes bunched step lines (BSLs) with various inhomogeneous step morphologies only on the CMP surface.


2003 ◽  
Vol 93 (11) ◽  
pp. 8903-8909 ◽  
Author(s):  
M. S. Janson ◽  
M. K. Linnarsson ◽  
A. Hallén ◽  
B. G. Svensson

2020 ◽  
Vol 10 (11) ◽  
pp. 4013
Author(s):  
Priya Darshni Kaushik ◽  
Gholam Reza Yazdi ◽  
Garimella Bhaskara Venkata Subba Lakshmi ◽  
Grzegorz Greczynski ◽  
Rositsa Yakimova ◽  
...  

Modification of epitaxial graphene on silicon carbide (EG/SiC) was explored by ion implantation using 10 keV nitrogen ions. Fragments of monolayer graphene along with nanostructures were observed following nitrogen ion implantation. At the initial fluence, sp3 defects appeared in EG; higher fluences resulted in vacancy defects as well as in an increased defect density. The increased fluence created a decrease in the intensity of the prominent peak of SiC as well as of the overall relative Raman intensity. The X-ray photoelectron spectroscopy (XPS) showed a reduction of the peak intensity of graphitic carbon and silicon carbide as a result of ion implantation. The dopant concentration and level of defects could be controlled both in EG and SiC by the fluence. This provided an opportunity to explore EG/SiC as a platform using ion implantation to control defects, and to be applied for fabricating sensitive sensors and nanoelectronics devices with high performance.


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