On the impact of buffer and GaN-channel thickness on current dispersion for GaN-on-Si RF/mmWave devices

Because of the high electron mobility and electron velocity in the channel, InAs/AlSb high electron mobility transistors (HEMTs) have excellent physical properties, compared with the other traditional III-V semiconductor components, such as ultra-high cut-off frequency, very low power consumption and good noise performance. In this paper, both the structure and working principle of InAs/AlSb HEMTs were studied, the energy band distribution of the InAs/AlSb heterojunction epitaxy was analyzed, and the generation mechanism and scattering mechanism of two-dimensional electron gas (2DEG) in InAs channel were demonstrated, based on the software simulation in detail. In order to discuss the impact of different epitaxial structures on the 2DEG and electron mobility in channel, four kinds of epitaxies with different thickness of InAs channel and AlSb upper-barrier were manufactured. The samples were evaluated with the contact Hall test. It is found the sample with a channel thickness of 15 nm and upper-barrier layer of 17 nm shows a best compromised sheet carrier concentration of 2.56 × 1012 cm−2 and electron mobility of 1.81 × 104 cm2/V·s, and a low sheet resistivity of 135 Ω/□, which we considered to be the optimized thickness of channel layer and upper-barrier layer. This study is a reference to further design InAs/AlSb HEMT, by ensuring a good device performance.

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The Impact of Tunneling on the Subthreshold Swing in Sub-20 nm Asymmetric Double Gate MOSFETs

International Journal of Electrical and Computer Engineering (IJECE) ◽

10.11591/ijece.v6i6.pp2730-2734 ◽

2016 ◽

Vol 6 (6) ◽

pp. 2730

Author(s):

Hak Kee Jung ◽

Sima Dimitrijev

Keyword(s):

Carrier Transport ◽

Thermionic Emission ◽

Tunneling Current ◽

Channel Length ◽

Subthreshold Swing ◽

Double Gate ◽

Subthreshold Region ◽

Channel Thickness ◽

20 Nm ◽

The Impact

<p>This paper analyzes the subthreshold swing in asymmetric double gate MOSFETs with sub-20 nm channel lengths. The analysis of the carrier transport in the subthreshold region of these nano scaled MOSFET includes tunneling as an important additional mechanism to the thermionic emission. It is found that the subthreshold swing is increasing due to tunneling current and that the performance of nano scaled MOSFETs is degraded. The degradation of the subthreshold swing due to tunneling is quantified using analytical potential distribution and Wentzel–Kramers–Brillouin (WKB) approximation in this paper. This analytical approach is verified by two dimensional simulation. It is shown that the degradation of subthreshold swing increases with both reduction of channel length and increase of channel thickness. We also show that the subthreshold swing is increasing in case of different top and bottom gate oxide thicknesses.</p>

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The Impact of Interfacial Layers on the Thermal Boundary Resistance and Residual Stress in GaN on Si Epitaxial Layers

Volume 3: Advanced Fabrication and Manufacturing; Emerging Technology Frontiers; Energy, Health and Water- Applications of Nano-, Micro- and Mini-Scale Devices; MEMS and NEMS; Technology Update Talks; Thermal Management Using Micro Channels, Jets, Sprays ◽

10.1115/ipack2015-48259 ◽

2015 ◽

Cited By ~ 1

Author(s):

Luke Yates ◽

Thomas L. Bougher ◽

Thomas Beechem ◽

Baratunde A. Cola ◽

Samuel Graham

Keyword(s):

Residual Stress ◽

Power Electronics ◽

Boundary Resistance ◽

Optical Methods ◽

Thermal Boundary Resistance ◽

Epitaxial Layers ◽

High Electron ◽

Interfacial Layers ◽

Gan On Si ◽

The Impact

The development of gallium nitride (GaN) on silicon (Si) substrates is a critical technology for potential low cost power electronics. These devices can accommodate faster switching speeds, hotter temperatures, and high voltages needed for power electronics applications. However, the lattice mismatch and difference in crystal structure between 111 Si and c-axis hexagonal GaN requires the use of buffer layers in order to grow device quality epitaxial layers. For lateral high electron mobility transistors, these interfacial layers act as a potential source of increased thermal boundary resistance (TBR) which impedes heat flow out of the GaN on Si devices. In addition, these interfacial layers impact the growth and residual stress in the GaN epitaxial layer which can play a role in device reliability. In this work we use optical methods to experimentally measure a relatively low TBR for GaN on Si with an intermediate buffer layer to be 3.8 ± 0.4 m2K/GW. The effective TBR of a material stack that encompasses GaN on Si with a superlattice (SL) buffer is also measured, and is found to be 107 ± 1 m2K/GW. In addition the residual state of strain in the GaN layer is measured for both samples, and is found to vary significantly between them. Thermal conductivity of a 0.8μm GaN layer on AlN buffer is determined to be 126 ± 25 W/m-K, while a 0.84 μm GaN layer with C-doping on a SL structure is determined to be 112 ± 29 W/m-K.

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Prepared for GaAs PHEMT Material

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.619.594 ◽

2012 ◽

Vol 619 ◽

pp. 594-597

Author(s):

Yan Lei Li ◽

Rui Xia Yang

Keyword(s):

Molecular Beam Epitaxy ◽

Layer Thickness ◽

Barrier Layer ◽

Molecular Beam ◽

Optimal Parameters ◽

Barrier Layer Thickness ◽

Spacer Layer Thickness ◽

Spacer Layer ◽

Channel Thickness ◽

The Impact

In this paper, GaAs PHEMT samples are prepared by the method of molecular beam epitaxy (MBE), The optimal parameters are determined by studying the impact of the barrier layer thickness, spacer layer thickness, Al composition of the barrier layer and the spacer layer , the channel thickness and channel In composition on Ns and μn.

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The Impact of Tunneling on the Subthreshold Swing in Sub-20 nm Asymmetric Double Gate MOSFETs

International Journal of Electrical and Computer Engineering (IJECE) ◽

10.11591/ijece.v6i6.13265 ◽

2016 ◽

Vol 6 (6) ◽

pp. 2730

Author(s):

Hak Kee Jung ◽

Sima Dimitrijev

Keyword(s):

Carrier Transport ◽

Thermionic Emission ◽

Tunneling Current ◽

Channel Length ◽

Subthreshold Swing ◽

Double Gate ◽

Subthreshold Region ◽

Channel Thickness ◽

20 Nm ◽

The Impact

<p>This paper analyzes the subthreshold swing in asymmetric double gate MOSFETs with sub-20 nm channel lengths. The analysis of the carrier transport in the subthreshold region of these nano scaled MOSFET includes tunneling as an important additional mechanism to the thermionic emission. It is found that the subthreshold swing is increasing due to tunneling current and that the performance of nano scaled MOSFETs is degraded. The degradation of the subthreshold swing due to tunneling is quantified using analytical potential distribution and Wentzel–Kramers–Brillouin (WKB) approximation in this paper. This analytical approach is verified by two dimensional simulation. It is shown that the degradation of subthreshold swing increases with both reduction of channel length and increase of channel thickness. We also show that the subthreshold swing is increasing in case of different top and bottom gate oxide thicknesses.</p>

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Understanding the Leakage Mechanisms and Breakdown Limits of Vertical GaN-on-Si p+n−n Diodes: The Road to Reliable Vertical MOSFETs

Micromachines ◽

10.3390/mi12040445 ◽

2021 ◽

Vol 12 (4) ◽

pp. 445

Author(s):

Kalparupa Mukherjee ◽

Carlo De Santi ◽

Matteo Buffolo ◽

Matteo Borga ◽

Shuzhen You ◽

...

Keyword(s):

Electric Field ◽

Breakdown Voltage ◽

Doping Concentration ◽

Temperature Dependent ◽

Trade Off ◽

The Road ◽

Current Voltage ◽

Gan On Si ◽

The Impact ◽

Tcad Simulations

This work investigates p+n−n GaN-on-Si vertical structures, through dedicated measurements and TCAD simulations, with the ultimate goal of identifying possible strategies for leakage and breakdown optimization. First, the dominant leakage processes were identified through temperature-dependent current–voltage characterization. Second, the breakdown voltage of the diodes was modelled through TCAD simulations based on the incomplete ionization of Mg in the p+ GaN layer. Finally, the developed simulation model was utilized to estimate the impact of varying the p-doping concentration on the design of breakdown voltage; while high p-doped structures are limited by the critical electric field at the interface, low p-doping designs need to contend with possible depletion of the entire p-GaN region and the consequent punch-through. A trade-off on the value of p-doping therefore exists to optimize the breakdown.

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