A Path to Energy Efficiency and Reliability for ICs: Fully Depleted Silicon-on-Insulator (FD-SOI) Devices Offer Many Advantages

2018 ◽  
Vol 10 (4) ◽  
pp. 24-33 ◽  
Author(s):  
Bich-Yen Nguyen ◽  
Philippe Flatresse ◽  
Jamie Schaeffer ◽  
Franck Arnaud ◽  
Souhir Mhira ◽  
...  
2013 ◽  
Vol 22 (01) ◽  
pp. 1350001
Author(s):  
FRANCISCO GÁMIZ ◽  
CARLOS SAMPEDRO ◽  
LUCA DONETTI ◽  
ANDRES GODOY

State-of-the-Art devices are approaching to the performance limit of traditional MOSFET as the critical dimensions are shrunk. Ultrathin fully depleted Silicon-on-Insulator transistors and multi-gate devices based on SOI technology are the best candidates to become a standard solution to overcome the problems arising from such aggressive scaling. Moreover, the flexibility of SOI wafers and processes allows the use of different channel materials, substrate orientations and layer thicknesses to enhance the performance of CMOS circuits. From the point of view of simulation, these devices pose a significant challenge. Simulations tools have to include quantum effects in the whole structure to correctly describe the behavior of these devices. The Multi-Subband Monte Carlo (MSB-MC) approach constitutes today's most accurate method for the study of nanodevices with important applications to SOI devices. After reviewing the main basis of MSB-MC method, we have applied it to answer important questions which remain open regarding ultimate SOI devices. In the first part of the chapter we present a thorough study of the impact of different Buried OXide (BOX) configurations on the scaling of extremely thin fully depleted SOI devices using a Multi-Subband Ensemble Monte Carlo simulator (MS-EMC). Standard thick BOX, ultra thin BOX (UTBOX) and UTBOX with ground plane (UTBOX+GP) solutions have been considered in order to check their influence on short channel effects (SCEs). The simulations show that the main limiting factor for downscaling is the DIBL and the UTBOX+GP configuration is the only valid one to downscale SGSOI transistors beyond 20 nm channel length keeping the silicon slab thickness above the theoretical limit of 5 nm, where thickness variability and mobility reduction would play an important role. In the second part, we have used the multisubband Ensemble Monte Carlo simulator to study the electron transport in ultrashort DGSOI devices with different confinement and transport directions. Our simulation results show that transport effective mass, and subband redistribution are the main factors that affect drift and scattering processes and, therefore, the general performance of DGSOI devices when orientation is changed


2005 ◽  
Vol 108-109 ◽  
pp. 439-444
Author(s):  
Helene Bourdon ◽  
Claire Fenouillet-Béranger ◽  
Claire Gallon ◽  
Philippe Coronel ◽  
Damien Lenoble

The fully depleted SOI devices present lateral isolation issues due to the shallow trench isolation (STI) process. We propose in this paper to study a new fabrication process for integrating local isolation trenches. Germanium (Ge) implantation is used to create SiGe (Silicon-Germanium) layer on thin SOI (silicon on insulator) that can be selectively etched. The advantage is the capability of implantation to localize the SiGe area on this substrate and to avoid STI process issues. Aggressive dimensions and geometries are studied and resulting material transformation (crystallization and Ge diffusion) are apprehending via SEM (Secondary Electron Microscopy) or AFM (Atomic Force Spectroscopy) to understand the etching kinetics. After optimization, we demonstrate the capability of fabricating localized trenches on SOI without degrading the neighboring Si layer or consuming the thin BOX (buried oxide).


2020 ◽  
Vol 23 (3) ◽  
pp. 227-252
Author(s):  
T.E. Rudenko ◽  
◽  
A.N. Nazarov ◽  
V.S. Lysenko ◽  
◽  
...  

Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.


Electronics ◽  
2021 ◽  
Vol 10 (13) ◽  
pp. 1585
Author(s):  
Hanbin Wang ◽  
Jinshun Bi ◽  
Mengxin Liu ◽  
Tingting Han

This work investigates the different sensitivities of an ion-sensitive field-effect transistor (ISFET) based on fully depleted silicon-on-insulator (FDSOI). Using computer-aided design (TCAD) tools, the sensitivity of a single-gate FDSOI based ISFET (FDSOI-ISFET) at different temperatures and the effects of the planar dual-gate structure on the sensitivity are determined. It is found that the sensitivity increases linearly with increasing temperature, reaching 890 mV/pH at 75 °C. By using a dual-gate structure and adjusting the control gate voltage, the sensitivity can be reduced from 750 mV/pH at 0 V control gate voltage to 540 mV/pH at 1 V control gate voltage. The above sensitivity changes are produced because the Nernst limit changes with temperature or the electric field generated by different control gate voltages causes changes in the carrier movement. It is proved that a single FDSOI-ISFET can have adjustable sensitivity by adjusting the operating temperature or the control gate voltage of the dual-gate device.


2008 ◽  
Vol 55 (6) ◽  
pp. 3259-3264 ◽  
Author(s):  
Farah E. Mamouni ◽  
Sriram K. Dixit ◽  
Ronald D. Schrimpf ◽  
Philippe C. Adell ◽  
Ivan S. Esqueda ◽  
...  

2015 ◽  
Vol 118 (18) ◽  
pp. 184504 ◽  
Author(s):  
C. Navarro ◽  
M. Bawedin ◽  
F. Andrieu ◽  
B. Sagnes ◽  
F. Martinez ◽  
...  

2021 ◽  
pp. 1-1
Author(s):  
Yu-Hung Liao ◽  
Khandker Akif Aabrar ◽  
Wriddhi Chakraborty ◽  
Wenshen Li ◽  
Suman Datta ◽  
...  

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