A comparative study on the electrical parameters of Au/n-Si Schottky diodes with and without interfacial (Ca1.9Pr0.1Co4Ox) layer

2016 ◽  
Vol 30 (16) ◽  
pp. 1650090 ◽  
Author(s):  
A. Kaya ◽  
H. G. Çetinkaya ◽  
Ş. Altındal ◽  
İ. Uslu

In order to compare the main electrical parameters such as ideality factor [Formula: see text], barrier height (BH) [Formula: see text], series [Formula: see text] and shunt [Formula: see text] resistances and energy density distribution profile of surface states [Formula: see text], the [Formula: see text]-[Formula: see text] (MS) Schotthy diodes (SDs), with and without interfacial [Formula: see text] layer were obtained from the current–voltage [Formula: see text]–[Formula: see text] measurements at room temperature. The other few electrical parameters such as Fermi energy level [Formula: see text], BH [Formula: see text]), [Formula: see text] and voltage dependence of [Formula: see text] profile were also obtained from the capacitance–voltage [Formula: see text]–[Formula: see text] measurements. The voltage dependence of [Formula: see text] profile has two distinctive peaks in the depletion region for two diodes and they were attributed to a particular distribution of [Formula: see text] located at metal–semiconductor (MS) interface. All of these results have been investigated at room temperature and results have been compared with each other. Experimental results confirmed that interfacial [Formula: see text] layer enhanced diode performance in terms of rectifier rate [Formula: see text] at [Formula: see text], [Formula: see text] [Formula: see text]at [Formula: see text] and [Formula: see text] [Formula: see text] with values of 265, [Formula: see text] and [Formula: see text] for MS type Schottky barrier diode and [Formula: see text], [Formula: see text] and [Formula: see text] for metal–insulator–semiconductor (MIS) type SBD, respectively. It is clear that the rectifying ratio of MIS type SBD is about 9660 times greater than MS type SBD. The value of barrier height (BH) obtained from [Formula: see text]–[Formula: see text] data is higher than the forward bias [Formula: see text]–[Formula: see text] data and it was attributed to the nature of measurements. These results confirmed that the interfacial [Formula: see text] layer has considerably improved the performance of SD.

2014 ◽  
Vol 29 (01) ◽  
pp. 1450237 ◽  
Author(s):  
H. G. Çetinkaya ◽  
D. E. Yıldız ◽  
Ş. Altındal

In order to see the effect of interfacial layer on electrical characteristics both Au /n–4 H – SiC (MS) and Au/TiO 2/n–4 H – SiC (MIS) type Schottky barrier diodes (SBDs) were fabricated and their main electrical parameters were investigated by using the forward and reverse bias current-voltage (I–V), capacitance/conductance-voltage (C/G–V) measurements at room temperature. The ideality factor (n), series and shunt resistances (Rs, Rsh), barrier height (BH), depletion layer width (WD) and the concentration of donor atoms (ND) were obtained before and after illumination. The energy density distribution profile of surface states (Nss) was also obtained by taking into account voltage dependent effective BH (Φe) and ideality factor (nV). All of these experimental results confirmed that the use of a high dielectric material or insulator layer ( TiO 2) between metal and semiconductor leads to improvements in the diode performance in terms of Rs, Rsh, BH, Nss and rectifier rate (RR = IF/IR for sufficiently high forward and reverse current). Another important result is the negative capacitance (NC) behavior observed in the forward bias C–V plot for the Au /n–4 H – SiC (MS) diode, but it disappears in Au/TiO 2/n–4 H – SiC (MIS) diode and also the minimum value of C–V plot corresponds to maximum value of G/ω–V plot in the accumulation region. Such behavior of NC shows that the material displays an inductive behavior.


1996 ◽  
Vol 53 (1) ◽  
pp. 118-122 ◽  
Author(s):  
A Türüt ◽  
B Bati ◽  
A Kökçe ◽  
M Sağlam ◽  
N Yalçin

2012 ◽  
Vol 2012 ◽  
pp. 1-9 ◽  
Author(s):  
V. Rajagopal Reddy ◽  
B. Prasanna Lakshmi ◽  
R. Padma

The effect of annealing temperature on electrical characteristics of iridium (Ir) and iridium/gold (Ir/Au) Schottky contacts to n-type InGaN have been investigated by means of current-voltage (I-V) and capacitance-voltage (C-V) techniques. It is observed that the barrier height of Ir/n-InGaN and Au/Ir/n-InGaN Schottky diodes increases after annealing at 300∘C for 1 min in N2 ambient compared to the as-deposited. However, the barrier heights are found to be decreased somewhat after annealing at 500∘C for the both Ir and Ir/Au Schottky contacts. From the above observations, it is clear that the optimum annealing temperature for both Ir and Ir/Au Schottky contacts is 300∘C. Moreover, the barrier height (ϕb), ideality factor (n) and series resistance (RS) are determined using Cheung’s and Norde methods. Besides, the energy distribution of interface state densities are determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. Based on the above results, it is clear that both Ir and Ir/Au Schottky contacts exhibit a kind of thermal stability during annealing.


2020 ◽  
Vol 5 (2) ◽  
Author(s):  
Ali Sadoun ◽  
Imad Kemerchou

In the present paper, using a numerical simulator, the simulation of Au/n-GaN and PEDOT: PSS/GaN structures were performed in a temperature at room temperature. The electrical parameters: barrier height, ideality factor, shunt resistance series, and resistance have been calculated using different methods: conventional I-V, Norde, Chattopadhyay, and Mikhelashvili. Statistical analysis showed that the Au/GaN structure has a barrier height of (0.6 eV) which is higher compared with the PEDOT: PSS/GaN structure (0.72 eV) and ideality factor (1.88 and 2.26) respectively. The values of resistance shunt were increased from 77150.056 Ω to 11207586 Ω. It is observed that the leakage current increased from 6.64E-5 to 4.98926E-5A at −0.85 V.


2009 ◽  
Vol 609 ◽  
pp. 195-199
Author(s):  
A. Keffous ◽  
M. Kechouane ◽  
Tahar Kerdja ◽  
Y. Belkacem ◽  
K. Bourenane ◽  
...  

In this paper we present the study of a Schottky diode gas sensing by using porous SiC films with palladium as a catalytic metal. The Schottky diodes were used for the first time for hydrocarbon (C2H6) gas sensing. The properties of the porous SiC films formed by electrochemical method were investigated by scanning electron microscopy (SEM). The electrical measurements were made at room temperature (295 K) in different ambient. The effect of the porous surface structure was investigated by evaluating electrical parameters such as the ideality factor (n), barrier height (Bp) and series resistance (Rs). The porous layer significantly affects the electrical properties of the Schottky diodes. Analysis of current-voltage (I-V) characteristics showed that the forward current might be described by a classical thermal emission theory. The ideality factor determined by the I–V characteristics was found to be dependent on the SiC thickness. For a thinner SiC layer (0.16 µm), the electrical parameters n was found around 1.135, 0.7041 eV for a barrier height and 45  for a series resistance, but for a thicker one (1.6 µm) n, Bp and Rs were 1.368, 0.7756 eV and 130 , respectively. The low value of the series resistance obtained using Cheung’s method clearly indicated the high performance of the Schottky diode for thinner SiC layer. This effect showed the uniformity of the SiC layer. Finally, sensitivity around 66 % and selectivity of the sensors were reached by using the PSC layer at low voltages below 0.5 Volt.


2005 ◽  
Vol 49 (4) ◽  
pp. 606-611 ◽  
Author(s):  
Guo-Ping Ru ◽  
R.L. Van Meirhaeghe ◽  
S. Forment ◽  
Yu-Long Jiang ◽  
Xin-Ping Qu ◽  
...  

2015 ◽  
Vol 29 (04) ◽  
pp. 1550010 ◽  
Author(s):  
Ahmet Kaya

The temperature and voltage dependence profile of the surface states (Nss), series resistance (Rs) and electrical conductivity (σ ac ) have been investigated in temperature and voltage ranges of 140–400 K and (-5 V )-(6 V ), respectively. The value of barrier height (BH) decreases with increasing temperature as ΦB(T) = (1.02 - 4×10-4⋅ T ) eV. These values of negative temperature coefficient (-4×10-4 eV ⋅ K -1) is in good agreement with the α of band gap of SiC (-3.1×10-4 eV ⋅ K -1). Capacitance-voltage (C–V) plots for all temperatures show an anomalous peak in the accumulation region because of the effect of series resistance (Rs) and Nss. The effect of Rs and Nss on the C and conductance (G) are found noticeable high especially at low temperatures. The decrease in C values also corresponds to an increase in G/ω values in the accumulation region. In addition, Ln (σ ac ) versus q/kT plots have two straight lines with different slopes which are corresponding to below and above room temperatures for various forward biases which are an evident two valid possible conduction mechanisms. The values of activation energy (Ea) were obtained from the slope of these plots and they changed from 6.3 meV to 4.7 meV below room temperatures and 42.5 meV to 34.4 meV for above room temperatures, respectively.


2019 ◽  
Vol 26 (10) ◽  
pp. 1950073 ◽  
Author(s):  
N. NANDA KUMAR REDDY ◽  
P. ANANDA ◽  
V. K. VERMA ◽  
K. RAHIM BAKASH

We have fabricated Ni/[Formula: see text]-Si metal–semiconductor (MS) and Ni/Ta2O5/[Formula: see text]-Si metal-insulator–semiconductor (MIS) Schottky barrier diodes at room temperature and studied their current density–voltage (J–V) and capacitance–voltage (C–V) characteristic properties. The forward bias J–V characteristics of the fabricated MS and MIS devices have been evaluated with the help of the thermionic emission (TE) mechanism. Schottky barrier height (SBH) values of 0.73 and 0.84[Formula: see text]eV and ideality factor values of 1.75 and 1.46 are extracted using J–V measurements for MS and MIS Schottky barrier diodes without and with Ta2O5 interfacial oxide layer, respectively. It was noted that the incorporation of Ta2O5 interfacial oxide layer enhanced the value of SBH for the MIS device because this oxide layer produced the substantial barrier between Ni and [Formula: see text]-Si and this obtained barrier height value is better than the conventional metal/[Formula: see text]-Si (MS) Schottky diodes. The rectification ratio (RR) calculated at [Formula: see text][Formula: see text]V for the MS structure is found to be [Formula: see text] and the MIS structure is found to be [Formula: see text]. Using Chung’s method, the series resistance ([Formula: see text]) values are calculated using [Formula: see text]/[Formula: see text] vs I plot and are found to be 21,603[Formula: see text][Formula: see text] for the Ni/[Formula: see text]-Si (MS) and 5489[Formula: see text][Formula: see text] for the Ni/Ta2O5/[Formula: see text]-Si (MIS) structures, respectively. In addition, [Formula: see text] vs [Formula: see text] plot has been utilized to evaluate the series resistance ([Formula: see text]) values and are found to be 14,064[Formula: see text][Formula: see text] for the Ni/[Formula: see text]-Si (MS) and 2236[Formula: see text][Formula: see text] for the Ni/Ta2O5/[Formula: see text]-Si (MIS) structures, respectively. In conclusion, by analyzing the experimental results, it is confirmed that the good quality performance is observed in Ni/Ta2O5/[Formula: see text]-Si (MIS) type SBD when compared to Ni/[Formula: see text]-Si (MS) type SBD and can be accredited to the intentionally formed thin Ta2O5 interfacial oxide layer between Nickel and [Formula: see text]-type Si.


1996 ◽  
Vol 421 ◽  
Author(s):  
J.W. Palmer ◽  
W.A. Anderson ◽  
D.T. Hoelzer ◽  
H. Hardtdegen

AbstractDepositing Pd or Au on n-InP at cryogenic substrate temperatures has previously been found to significantly increase the barrier height of the resulting Schottky diode. Cross-sectional transmission electron microscopy (XTEM) has been performed on Pd/InP and Au/InP interfaces formed at room temperature (RT) and low temperature (LT) to determine the differences responsible for the change in barrier height. In the Pd case, a solid state amorphization which occurs at the interface upon RT metal deposition is nearly eliminated in as-deposited LT Pd/InP diodes. In the Au case, RT deposition results in the initial monolayers of Au entering the InP lattice, while no such effect was observed in the LT Au/InP diodes. It is clear that the LT deposition dramatically reduces the interaction between the metal and substrate, resulting in a greater barrier height. Enhanced barrier height Schottky diodes are crucial to the development of optical and electronic devices on InP. Preliminary results will be discussed on metalsemiconductor- metal (MSM) photodetectors and metal-semiconductor field-effect-transistors (MESFET's) fabricated using the LT process.


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