Shorting out bonding method for multi-stack anodic bonding and its application in wafer-level packaging

2020 ◽  
Vol 34 (32) ◽  
pp. 2050369
Author(s):  
Yifang Liu ◽  
Tingting Dai ◽  
Peiqin Xie ◽  
Lingyun Wang ◽  
Zhan Zhan ◽  
...  
Keyword(s):  
Anodic Bonding ◽  
Wafer Level ◽  
Temperature Property ◽  
Mems Packaging ◽  
Long Term Stability ◽  
Wafer Level Packaging ◽  
Voltage Division ◽  
Rc Circuit ◽  
Bonding Method

Silicon/glass anodic bonding is widely investigated during MEMS packaging of multi-stack structures. The electrical behavior of anode bonding can be described as the charging and discharging process of RC circuit. Here, we conduct the equivalent RC circuit model analysis and experimental investigation, and demonstrate that voltage division and electricity leakage are the dilemma for the conventional multi-stack anodic bonding. By using feedthrough, the feasibility and convenience of “shorting out bonding” is presented, which is exampled through the wafer-level packaging of the MEMS gyroscope. Result from the sensor’s vacuum characterization reveals that shorting out bonding for multi-stack silicon/glass structures is an effective method for wafer-level packaging due to long-term stability and low temperature property.‘

Wafer Level Package for MEMS with TSVs and Hermetic Seal

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 002314-002335
Author(s):  
Akinori Shiraishi ◽  
Mitsutoshi Higashi ◽  
Kei Murayama ◽  
Yuichi Taguchi ◽  
Kenichi Mori
Keyword(s):  
Silicon Wafer ◽  
Adhesive Bonding ◽  
Anodic Bonding ◽  
Back Side ◽  
Wafer Level ◽  
Wafer Level Packaging ◽  
Hermetic Seal ◽  
Mems Device ◽  
Bonding Method ◽  
Wafer Level Package

In recent years, downsizing of MEMS package and high accuracy MEMS device mounting have been strongly required from expanding applications that using MEMS not only for industrial and automobile but also for consumer typified mobile phone. In order to achieve that, it is appropriate to use Silicon package that can be mounted at wafer level packaging. Silicon package is made of monocrystal silicon wafer. The deep cavity is fabricated on monocrystal silicon wafer by Wet or Dry etching. And MEMS device can be mounted on the cavity. The electrical connecting between front side and back side of cavity portion is achieved by TSVs that located on the bottom of cavity. Hermetic seal can be achieved by using glass or silicon wafer bonding method. By using a driver device wafer (before dicing) as the cap for hermetic seal, smaller size and smaller number of parts module can be fabricated. In this report, methods and designs for hermetic seal with wafer level process were examined. Methods that applied were polyimide adhesive bonding, anodic bonding and Au-In solder bonding. Location of TSVs on the bottom of cavity and thickness of diaphragm with TSVs was also examined. Silicon package for piezo type gyro MEMS that designed by the result of evaluation was fabricated. This package used optimized Au-In solder bonding for hermetic seal and optimized location of TSVs for interconnection. That was designed over 50% thinner than conventional ceramic packages. Characteristics of hermetic seal were evaluated by Q factor of gyro MEMS that mounted inside of the silicon package. It is confirmed that performance of sealing are good enough for running of the MEMS.

Wafer Level Micropackaging of MEMS Devices Using Thin Film Anodic Bonding

2002 ◽  
Vol 729 ◽  
Author(s):  
Lauren E. S. Rohwer ◽  
Andrew D. Oliver ◽  
Melissa V. Collins
Keyword(s):  
Shear Strength ◽  
Test Sample ◽  
Anodic Bonding ◽  
Mems Devices ◽  
Wafer Level ◽  
Thermal Actuators ◽  
Wafer Level Packaging ◽  
Hermetic Seal ◽  
Leak Testing ◽  
Before And After

AbstractA wafer level packaging technique that involves anodic bonding of Pyrex wafers to released surface micromachined wafers is demonstrated. Besides providing a hermetic seal, this technique allows full wafer release, provides protection during die separation, and offers the possibility of integration with optoelectronic devices. Anodic bonding was performed under applied voltages up to 1000 V, and temperatures ranging from 280 to 400°C under vacuum (10-4Torr). The quality of the bonded interfaces was evaluated using shear strength testing and leak testing. The shear strength of Pyrex-to-polysilicon and aluminum bonds was ∼10-15 MPa. The functionality of surface micromachined polysilicon devices was tested before and after anodic bonding. 100% of thermal actuators, 94% of torsional ratcheting actuators, and 70% of microengines functioned after bonding. The 70% yield was calculated from a test sample of 25 devices.

Effects of Packaging Induced Stress on MEMS Devices and Its Improvements

2006 ◽  
Vol 326-328 ◽  
pp. 529-532
Author(s):  
Sung Hoon Choa ◽  
Moon Chul Lee ◽  
Yong Chul Cho
Keyword(s):  
Silicon On Insulator ◽  
Anodic Bonding ◽  
Mems Devices ◽  
Wafer Level ◽  
Process Technology ◽  
Molding Compound ◽  
Mems Packaging ◽  
Induced Stress ◽  
Induced Structure ◽  
Glass Process

In MEMS, packaging induced stress or stress induced structure deformation becomes increasing concerns since it directly affects the performance of the device. The conventional MEMS SOI (silicon-on-insulator) gyroscope, packaged using the anodic bonding at the wafer level and EMC (epoxy molding compound) molding, has a deformation of MEMS structure caused by thermal expansion mismatch. Therefore we propose a packaged SiOG (Silicon On Glass) process technology and more robust spring design.

New getter configuration at wafer level for assuring long term stability of MEMs

2003 ◽  
Author(s):  
Marco Moraja ◽  
Marco Amiotti ◽  
Richard C. Kullberg
Keyword(s):  
Wafer Level ◽  
Term Stability ◽  
Long Term Stability

scholarly journals A Miniaturised, Fully Integrated NDIR CO2 Sensor On-Chip

Sensors ◽  
2021 ◽  
Vol 21 (16) ◽  
pp. 5347
Author(s):  
Xiaoning Jia ◽  
Joris Roels ◽  
Roel Baets ◽  
Gunther Roelkens
Keyword(s):  
Water Vapor ◽  
Limit Of Detection ◽  
Wafer Level ◽  
Water Vapor Absorption ◽  
Optical Source ◽  
Fully Integrated ◽  
Term Stability ◽  
Long Term Stability ◽  
Co2 Sensor

In this paper, we present a fully integrated Non-dispersive Infrared (NDIR) CO2 sensor implemented on a silicon chip. The sensor is based on an integrating cylinder with access waveguides. A mid-IR LED is used as the optical source, and two mid-IR photodiodes are used as detectors. The fully integrated sensor is formed by wafer bonding of two silicon substrates. The fabricated sensor was evaluated by performing a CO2 concentration measurement, showing a limit of detection of ∼750 ppm. The cross-sensitivity of the sensor to water vapor was studied both experimentally and numerically. No notable water interference was observed in the experimental characterizations. Numerical simulations showed that the transmission change induced by water vapor absorption is much smaller than the detection limit of the sensor. A qualitative analysis on the long term stability of the sensor revealed that the long term stability of the sensor is subject to the temperature fluctuations in the laboratory. The use of relatively cheap LED and photodiodes bare chips, together with the wafer-level fabrication process of the sensor provides the potential for a low cost, highly miniaturized NDIR CO2 sensor.

Ceramic Via Wafer-Level Packaging for MEMS

2005 ◽  
Author(s):  
John M. Heck ◽  
Leonel R. Arana ◽  
Bill Read ◽  
Thomas S. Dory
Keyword(s):  
Mems Devices ◽  
Wafer Level ◽  
Micro Electro Mechanical Systems ◽  
Mems Switches ◽  
Mems Packaging ◽  
Wafer Level Packaging ◽  
Novel Approach ◽  
Electrical Interconnection ◽  
Tin Silver Copper ◽  
Board Level

We will present a novel approach to wafer level packaging for micro-electro-mechanical systems. Like most common MEMS packaging methods today, our approach utilizes a wafer bonding process between a cap wafer and a MEMS device wafer. However, unlike the common methods that use a silicon or glass cap wafer, our approach uses a ceramic wafer with built-in metal-filled vias, that has the same size and shape as a standard 150 mm silicon wafer. This ceramic via wafer packaging method is much less complex than existing methods, since it provides hermetic encapsulation and electrical interconnection of the MEMS devices, as well as a solderable interface on the outside of the package for board-level interconnection. We have demonstrated successful ceramic via wafer-level packaging of MEMS switches using eutectic gold-tin solder as well as tin-silver-copper solder combined with gold thermo-compression bonding. In this paper, we will present the ceramic via MEMS package architecture and discuss the associated bonding and assembly processes.

Wafer Bonding Processes for the Manufacture of Microsystems

2008 ◽  
Author(s):  
Tony Rogers ◽  
Nick Aitken
Keyword(s):  
Bond Strength ◽  
Wafer Bonding ◽  
High Efficiency ◽  
Glass Frit ◽  
Acoustic Microscopy ◽  
Anodic Bonding ◽  
High Yield ◽  
Mems Devices ◽  
Wafer Level ◽  
Wafer Level Packaging

Wafer bonding is a widely used step in the manufacture of Microsystems, and serves several purposes: • Structural component of the MEMS device. • First level packaging. • Encapsulation of vacuum or controlled gas. In addition the technology is becoming more widely used in IC fabrication for wafer level packaging (WLP) and 3D integration. It is also widely used for the fabrication of micro fluidic structures and in the manufacture of high efficiency LED’s. Depending on the application, temperature constraints, material compatibility etc. different wafer bonding processes are available, each with their own benefits and drawbacks. This paper describes various wafer bonding processes that are applicable, not only to silicon, but other materials such as glass and quartz that are commonly used in MEMS devices. The process of selecting the most appropriate bonding process for the particular application is presented along with examples of anodic, glass frit, eutectic, direct, adhesive and thermo-compression bonding. The examples include appropriate metrology for bond strength and quality. The paper also addresses the benefits of being able to treat the wafer surfaces in-situ prior to bonding in order to improve yield and bond strength, and also discusses equipment requirements for achieving high yield wafer bonding, along with high precision alignment accuracy, good force and temperature uniformity, high wafer throughput, etc. Some common problems that can affect yield are identified and discussed. These include local temperature variations, that can occur with anodic bonding, and how to eliminate them; how to cope with materials of different thermal expansion coefficient; how best to deal with out-gassing and achieve vacuum encapsulation; and procedures for multi-stacking wafers of differing thicknesses. The presentation includes infra-red and scanning acoustic microscopy images of various bond types, plus some examples of what can go wrong if the correct manufacturing protocol is not maintained.

Advanced Anodic Bonding Processes For MEMS Applications

2003 ◽  
Vol 782 ◽  
Author(s):  
V. Dragoi ◽  
P. Lindner ◽  
T. Glinsner ◽  
M. Wimplinger ◽  
S. Farrens
Keyword(s):  
Three Dimensional ◽  
Anodic Bonding ◽  
Process Conditions ◽  
Wafer Level ◽  
Process Step ◽  
Packaging Process ◽  
Powerful Technique ◽  
Wafer Level Packaging ◽  
Single Process ◽  
Single Process Step

ABSTRACTAnodic bonding is a powerful technique used in MEMS manufacturing. This process is applied mainly for building three-dimensional structures for microfluidic applications or for wafer level packaging. Process conditions will be evaluated in present paper. An experimental solution for bonding three wafers in one single process step (“triple-stack bonding”) will be introduced.

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