Reliability Analysis and Performance Evaluation of STT-MRAM-Based Physical Unclonable Function

SPIN ◽  
2020 ◽  
Vol 10 (02) ◽  
pp. 2040002
Author(s):  
You Wang ◽  
Hanchen Wang ◽  
Weisheng Zhao ◽  
Hao Cai

Physical unclonable function (PUF) is considered as a promising primitive for variety of security applications since its appearance, such as authentication, key generators and random oracle. With the fast development of Internet of Things (IoT), the requirement for low complexity, high power efficiency and enhanced security level of PUF becomes urgent. Meanwhile, the conventional PUF instances based on optical effect and semiconductors fail to meet the requirements due to poor scalability and sensitivity to attacks. This paper proposes a circuit design of PUF by utilizing the spin transfer torque magnetic random access memory (STT-MRAM). The performance of presented circuit design is thoroughly investigated from the aspects of uniqueness, reliability, uniformity, diffuseness, access speed and energy consumption. The simulation results show that the inter-Hamming distance can achieve 50% and the intra-Hamming distance can be reduced as low as 0%, resulting in perfect security. Meanwhile, the circuit behaves high immunity to environmental variations such as high and low temperature. With the rapid development of artificial intelligence, many powerful attack methods emerge. To defend against these attacks, the user reconfigurable function has been proposed. Moreover, design space including programming voltage, device parameters and thermal conditions has been explored to optimize the reliability of this function.

SPIN ◽  
2017 ◽  
Vol 07 (03) ◽  
pp. 1740013 ◽  
Author(s):  
Tao Wang ◽  
John Q. Xiao ◽  
Xin Fan

Two decades after the discovery of the giant magnetoresistance that revolutionizes the hard disk drive, the rapid development of spin torque-based magnetic random access memory has once again demonstrated the great potential of spintronics in practical applications. While the industrial application is mainly focusing on the implementation of current-induced spin transfer torque (STT) in magnetic tunnel junctions, a new type of spin torque emerges due to the spin–orbit interaction in magnetic multilayers. A great effort has been devoted by the scientific community to study the so-called spin–orbit torque (SOT), which is not only of interest to fundamental science, but also exhibits potential for the application of current-induced magnetization switching. In this paper, we will review recent development in the SOTs including the fundamental understanding, materials development and measurement techniques. We will also discuss the challenges of using the SOT in potential applications, particularly on the switching of perpendicularly magnetized films.


Micromachines ◽  
2020 ◽  
Vol 11 (5) ◽  
pp. 502
Author(s):  
Wei-Chen Chien ◽  
Yu-Chian Chang ◽  
Yao-Tung Tsou ◽  
Sy-Yen Kuo ◽  
Ching-Ray Chang

Physical unclonable function (PUF), a hardware-efficient approach, has drawn a lot of attention in the security research community for exploiting the inevitable manufacturing variability of integrated circuits (IC) as the unique fingerprint of each IC. However, analog PUF is not robust and resistant to environmental conditions. In this paper, we propose a digital PUF-based secure authentication model using the emergent spin-transfer torque magnetic random-access memory (STT-MRAM) PUF (called STT-DPSA for short). STT-DPSA is an original secure identity authentication architecture for Internet of Things (IoT) devices to devise a computationally lightweight authentication architecture which is not susceptible to environmental conditions. Considering hardware security level or cell area, we alternatively build matrix multiplication or stochastic logic operation for our authentication model. To prove the feasibility of our model, the reliability of our PUF is validated via the working windows between temperature interval (−35 ∘ C, 110 ∘ C) and Vdd interval [0.95 V, 1.16 V] and STT-DPSA is implemented with parameters n = 32, i = o = 1024, k = 8, and l = 2 using FPGA design flow. Under this setting of parameters, an attacker needs to take time complexity O( 2 256 ) to compromise STT-DPSA. We also evaluate STT-DPSA using Synopsys design compiler with TSMC 0.18 um process.


2021 ◽  
Vol 26 (3) ◽  
pp. 1-17
Author(s):  
Urmimala Roy ◽  
Tanmoy Pramanik ◽  
Subhendu Roy ◽  
Avhishek Chatterjee ◽  
Leonard F. Register ◽  
...  

We propose a methodology to perform process variation-aware device and circuit design using fully physics-based simulations within limited computational resources, without developing a compact model. Machine learning (ML), specifically a support vector regression (SVR) model, has been used. The SVR model has been trained using a dataset of devices simulated a priori, and the accuracy of prediction by the trained SVR model has been demonstrated. To produce a switching time distribution from the trained ML model, we only had to generate the dataset to train and validate the model, which needed ∼500 hours of computation. On the other hand, if 10 6 samples were to be simulated using the same computation resources to generate a switching time distribution from micromagnetic simulations, it would have taken ∼250 days. Spin-transfer-torque random access memory (STTRAM) has been used to demonstrate the method. However, different physical systems may be considered, different ML models can be used for different physical systems and/or different device parameter sets, and similar ends could be achieved by training the ML model using measured device data.


2020 ◽  
Vol 2020 ◽  
pp. 1-12
Author(s):  
Quanrun Li ◽  
Chingfang Hsu ◽  
Debiao He ◽  
Kim-Kwang Raymond Choo ◽  
Peng Gong

With the rapid development of quantum computing and quantum information technology, the universal quantum computer will emerge in the near decades with a very high probability and it could break most of the current public key cryptosystems totally. Due to the ability of withstanding the universal quantum computer’s attack, the lattice-based cryptosystems have received lots of attention from both industry and academia. In this paper, we propose an identity-based blind signature scheme using lattice. We also prove that the proposed scheme is provably secure in the random oracle model. The performance analysis shows that the proposed scheme has less mean value of sampling times and smaller signature size than previous schemes. Thus, the proposed scheme is more suitable for practical applications.


2012 ◽  
Vol 48 (11) ◽  
pp. 3025-3030 ◽  
Author(s):  
E. Chen ◽  
D. Apalkov ◽  
A. Driskill-Smith ◽  
A. Khvalkovskiy ◽  
D. Lottis ◽  
...  

2019 ◽  
Vol 9 (1) ◽  
Author(s):  
Jodi M. Iwata-Harms ◽  
Guenole Jan ◽  
Santiago Serrano-Guisan ◽  
Luc Thomas ◽  
Huanlong Liu ◽  
...  

AbstractPerpendicular magnetic anisotropy (PMA) ferromagnetic CoFeB with dual MgO interfaces is an attractive material system for realizing magnetic memory applications that require highly efficient, high speed current-induced magnetic switching. Using this structure, a sub-nanometer CoFeB layer has the potential to simultaneously exhibit efficient, high speed switching in accordance with the conservation of spin angular momentum, and high thermal stability owing to the enhanced interfacial PMA that arises from the two CoFeB-MgO interfaces. However, the difficulty in attaining PMA in ultrathin CoFeB layers has imposed the use of thicker CoFeB layers which are incompatible with high speed requirements. In this work, we succeeded in depositing a functional CoFeB layer as thin as five monolayers between two MgO interfaces using magnetron sputtering. Remarkably, the insertion of Mg within the CoFeB gave rise to an ultrathin CoFeB layer with large anisotropy, high saturation magnetization, and good annealing stability to temperatures upwards of 400 °C. When combined with a low resistance-area product MgO tunnel barrier, ultrathin CoFeB magnetic tunnel junctions (MTJs) demonstrate switching voltages below 500 mV at speeds as fast as 1 ns in 30 nm devices, thus opening a new realm of high speed and highly efficient nonvolatile memory applications.


2021 ◽  
Vol 3 ◽  
Author(s):  
Shima Hosseinzadeh ◽  
Mehrdad Biglari ◽  
Dietmar Fey

Non-volatile memory (NVM) technologies offer a number of advantages over conventional memory technologies such as SRAM and DRAM. These include a smaller area requirement, a lower energy requirement for reading and partly for writing, too, and, of course, the non-volatility and especially the qualitative advantage of multi-bit capability. It is expected that memristors based on resistive random access memories (ReRAMs), phase-change memories, or spin-transfer torque random access memories will replace conventional memory technologies in certain areas or complement them in hybrid solutions. To support the design of systems that use NVMs, there is still research to be done on the modeling side of NVMs. In this paper, we focus on multi-bit ternary memories in particular. Ternary NVMs allow the implementation of extremely memory-efficient ternary weights in neural networks, which have sufficiently high accuracy in interference, or they are part of carry-free fast ternary adders. Furthermore, we lay a focus on the technology side of memristive ReRAMs. In this paper, a novel memory model in the circuit level is presented to support the design of systems that profit from ternary data representations. This model considers two read methods of ternary ReRAMs, namely, serial read and parallel read. They are extensively studied and compared in this work, as well as the write-verification method that is often used in NVMs to reduce the device stress and to increase the endurance. In addition, a comprehensive tool for the ternary model was developed, which is capable of performing energy, performance, and area estimation for a given setup. In this work, three case studies were conducted, namely, area cost per trit, excessive parameter selection for the write-verification method, and the assessment of pulse width variation and their energy latency trade-off for the write-verification method in ReRAM.


2019 ◽  
Vol 46 (1) ◽  
pp. 67-78
Author(s):  
Septian Eka Prayoga ◽  
Arif Kusumawanto

Surface materials that turn into hard surface material and lack of vegetations are some of the effects of rapid development that can affect the micro climate in urban areas. This happened on Cik Ditiro corridor in the city of Yogyakarta which had quite dense activities, this was marked by various functions of land use and human activities throughout the day. The method is simulation method that uses the EnviMET 4.0 software and the empirical measurements. This method is to simulate the value of each climate variable in existing conditions and ideal conditions. The results of this research show that the condition of the Cik Ditiro corridor still belongs to the heat which is uncomfortable thermal conditions. Recommendations result of this research is to make better thermal comfort on corridor. The result of this research to give recommendations in terms of improving better for thermal comfort.


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