scholarly journals Power-Aware Routing and Network Design with Bundled Links: Solutions and Analysis

2013 ◽  
Vol 2013 ◽  
pp. 1-16 ◽  
Author(s):  
Rosario G. Garroppo ◽  
Stefano Giordano ◽  
Gianfranco Nencioni ◽  
Maria Grazia Scutellà
Keyword(s):  
Power Consumption ◽  
Network Design ◽  
Power Management ◽  
Network Topology ◽  
Traffic Load ◽  
Management Problem ◽  
Traffic Demand ◽  
Interface Card ◽  
The Relationship ◽  
Qos Requirement

The paper deeply analyzes a novel network-wide power management problem, called Power-Aware Routing and Network Design with Bundled Links (PARND-BL), which is able to take into account both the relationship between the power consumption and the traffic throughput of the nodes and to power off both the chassis and even the single Physical Interface Card (PIC) composing each link. The solutions of the PARND-BL model have been analyzed by taking into account different aspects associated with the actual applicability in real network scenarios: (i) the time for obtaining the solution, (ii) the deployed network topology and the resulting topology provided by the solution, (iii) the power behavior of the network elements, (iv) the traffic load, (v) the QoS requirement, and (vi) the number of paths to route each traffic demand. Among the most interesting and novel results, our analysis shows that the strategy of minimizing the number of powered-on network elements through the traffic consolidation does not always produce power savings, and the solution of this kind of problems, in some cases, can lead to spliting a single traffic demand into a high number of paths.

scholarly journals Efficient Prediction of Network Traffic for Real-Time Applications

2019 ◽  
Vol 2019 ◽  
pp. 1-11 ◽  
Author(s):  
Muhammad Faisal Iqbal ◽  
Muhammad Zahid ◽  
Durdana Habib ◽  
Lizy Kurian John
Keyword(s):  
Power Consumption ◽  
Real Time ◽  
Power Management ◽  
Dynamic Resource Allocation ◽  
Computation Complexity ◽  
Real Time Traffic ◽  
Double Exponential ◽  
Efficient Prediction ◽  
Dynamic Resource ◽  
Double Exponential Smoothing

Accurate real-time traffic prediction is required in many networking applications like dynamic resource allocation and power management. This paper explores a number of predictors and searches for a predictor which has high accuracy and low computation complexity and power consumption. Many predictors from three different classes, including classic time series, artificial neural networks, and wavelet transform-based predictors, are compared. These predictors are evaluated using real network traces. Comparison of accuracy and cost, both in terms of computation complexity and power consumption, is presented. It is observed that a double exponential smoothing predictor provides a reasonable tradeoff between performance and cost overhead.

scholarly journals On-Demand Channel Bonding in Heterogeneous WLANs: A Multi-Agent Deep Reinforcement Learning Approach

Sensors ◽  
2020 ◽  
Vol 20 (10) ◽  
pp. 2789 ◽  
Author(s):  
Hang Qi ◽  
Hao Huang ◽  
Zhiqun Hu ◽  
Xiangming Wen ◽  
Zhaoming Lu
Keyword(s):  
Reinforcement Learning ◽  
Transmission Rate ◽  
Single Agent ◽  
Time Of Day ◽  
Action Space ◽  
Traffic Load ◽  
Traffic Demand ◽  
Channel Bonding ◽  
On Demand ◽  
Multi Agent

In order to meet the ever-increasing traffic demand of Wireless Local Area Networks (WLANs), channel bonding is introduced in IEEE 802.11 standards. Although channel bonding effectively increases the transmission rate, the wider channel reduces the number of non-overlapping channels and is more susceptible to interference. Meanwhile, the traffic load differs from one access point (AP) to another and changes significantly depending on the time of day. Therefore, the primary channel and channel bonding bandwidth should be carefully selected to meet traffic demand and guarantee the performance gain. In this paper, we proposed an On-Demand Channel Bonding (O-DCB) algorithm based on Deep Reinforcement Learning (DRL) for heterogeneous WLANs to reduce transmission delay, where the APs have different channel bonding capabilities. In this problem, the state space is continuous and the action space is discrete. However, the size of action space increases exponentially with the number of APs by using single-agent DRL, which severely affects the learning rate. To accelerate learning, Multi-Agent Deep Deterministic Policy Gradient (MADDPG) is used to train O-DCB. Real traffic traces collected from a campus WLAN are used to train and test O-DCB. Simulation results reveal that the proposed algorithm has good convergence and lower delay than other algorithms.

scholarly journals Leaders’ Image Concerns Is Moderator to Interfere with Leader Career Role and Leader Impression Management

2016 ◽  
Vol 11 (5) ◽  
pp. 121
Author(s):  
Mei-Mei Lin
Keyword(s):  
Structural Equation Modeling ◽  
Impression Management ◽  
Structural Equation ◽  
Skill Training ◽  
Equation Modeling ◽  
Management Problem ◽  
Personal Character ◽  
The World ◽  
Relationship Of ◽  
The Relationship

<p>There is no same image who displayed out in the world because Leader career roles developed always leans on personal character, but it could describe as each person trend to play some a particular role. However the career role developed by nature and environment, impression management upon nurture education and skill training meanwhile involve with final result so that this work supposes career role would significant influence impression management. Hence image could be control if who would like to mold into a particular image on purpose for achievement. In addition to leaders in organization always have more pressure than employees whether performance or profit especial in such economic hardship. So that this work assumes leader career role significant affect to leader impression management and leaders’ image concerns is moderator to interfere with the relationship of these two aspects. At last this work assays hypotheses successful via structural equation modeling. According to the result, this work looks forward to make industries to clear up management problem and digs out more potential crises.</p>

scholarly journals Toward Green Sensor Field by Optimizing Power Efficiency Using D-Policy M/G/1 Queuing Systems

2013 ◽  
Vol 9 (3) ◽  
pp. 241-260 ◽  
Author(s):  
Fuu-Cheng Jiang ◽  
Hsiang-Wei Wu ◽  
Fang-Yi Leu ◽  
Chao-Tung Yang
Keyword(s):  
Sensor Networks ◽  
Power Consumption ◽  
Power Efficiency ◽  
Ieee 802.15.4 ◽  
Power Saving ◽  
Rechargeable Batteries ◽  
Sensor Nodes ◽  
Traffic Load ◽  
Mathematical Framework ◽  
Sensor Field

Power efficiency is a crucially important issue in the IEEE 802.15.4/ZigBee sensor networks (ZSNs) for majority of sensor nodes equipped with non-rechargeable batteries. To increase the lifetime of sensor networks, each node must optimize power consumption as possible. Among open literatures, much research works have focused on how to optimally increase the probability of sleeping states using multifarious wake-up strategies. Making things different, in this article, we propose a novel optimization framework for alleviating power consumption of sensor node with the D-policy M/G/1 queuing approach. Toward green sensor field, the proposed power-saving technique can be applied to prolong the lifetime of ZSN economically and effectively. For the proposed data aggregation model, mathematical framework on performance measures has been formulated. Data simulation using MATLAB tool has been conducted for exploring the feasibility of the proposed approach. And also we analyze the average traffic load per node for tree-based ZSN. Focusing on ZigBee routers deployed at the innermost shell of ZSN, network simulation results validate that the proposed approach indeed provides a feasibly cost-effective approach for prolonging lifetime of ZSNs.

scholarly journals Dynamic Voltage Scaling With Reduced Frequency Switching And Preemptions

2012 ◽  
pp. 10-14
Author(s):  
Arya Lekshmi Mohan ◽  
Anju S. Pillai
Keyword(s):  
Power Consumption ◽  
Power Management ◽  
Voltage Scaling ◽  
Dynamic Voltage Scaling ◽  
Discrete Frequency ◽  
Cpu Time ◽  
Innovative Technique ◽  
Reduced Frequency ◽  
Dynamic Voltage

Dynamic Voltage Scaling is an innovative technique for reducing the power consumption of a processor by utilizing its hardware functionality. Dynamic Voltage Scaling processors are mainly focusing on power management. Such processors can be switch between discrete frequency and voltage levels. The main challenges of Dynamic Voltage Scaling are increased number of preemptions and frequency switching. A part of dynamic energy as well as CPU time is lost due to these processes. To limit such processes, an algorithm is proposed which reduces both unwanted frequency switching and preemptions.

Green Semicondoctor Design Techniques and Challanges

2011 ◽  
pp. 404-411
Author(s):  
Somesh Rajain ◽  
Chetan Shingala ◽  
Ekata Mehul
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Management ◽  
Human Life ◽  
Semiconductor Industry ◽  
Low Power Design ◽  
Clock Gating ◽  
Consumer Device ◽  
Carbon Dioxide Co2 ◽  
Design Techniques

The large emission of Carbon dioxide (CO2) is not only affecting our ecology but also affecting human life. In schools, offices, factory and crowded railway/bus stations i.e crowded places with insufficient ventilations CO2 affects human life most. In a closed environment like school, If CO2 level starts raising above 700 parts per million (ppm) people will feel objectionable body odors and as it increase further people will feel very uncomfortable, dizzy and have headache etc. Our goal is to reduce CO2 emission and lower global warming. In Semiconductor Industry as the digital technology grows, the functionality of our electronics devices (For example: - Mobile phone, PC’s, home appliances etc) is constantly improves and mean while the demand for electronic devices to be more environment friendly is increasing. So we have to design systems with Low power consumption to curtail down green house gas emission as well as low power design are also a requirement of today’s market. The usage of mobile device in all kinds of applications is increasing day by day. These applications and corresponding devices also have their power requirements. The demand for mobile consumer device has made the power management the number one consideration in today‘s system design. To increase battery life, system chip designer needs to adopt an aggressive power management technique which includes multi voltage Design Island, power gating, dynamic voltage, frequency scaling, clock gating etc in the system. Adding all these greatly complicates the verification for the chip. Normally the designer neglects the implementation of power saving techniques due to the tradeoff between power reduction and verification costs. The costs become more important in terms of business, which leads to more power consumption. Those details can still be implemented provided we use right kind of tools & techniques that are also combined with design experience. In this chapter the focus is to firstly describe low power design techniques, its verification challenges and its solutions followed by the case study. It also guides for the selection of programmable device & RTL Core design criteria. To make green electronics devices we have to design system with low power design techniques.

scholarly journals Idleness-Aware Dynamic Power Mode Selection on the i.MX 7ULP IoT Edge Processor

2020 ◽  
Vol 10 (2) ◽  
pp. 19
Author(s):  
Alfio Di Mauro ◽  
Hamed Fatemi ◽  
Jose Pineda de Gyvez ◽  
Luca Benini
Keyword(s):  
Power Consumption ◽  
Power Management ◽  
Management Strategy ◽  
Low Cost ◽  
Mode Selection ◽  
Worst Case ◽  
Dynamic Power ◽  
Dynamic Tuning ◽  
Power Management Strategy ◽  
Power Mode

Power management is a crucial concern in micro-controller platforms for the Internet of Things (IoT) edge. Many applications present a variable and difficult to predict workload profile, usually driven by external inputs. The dynamic tuning of power consumption to the application requirements is indeed a viable approach to save energy. In this paper, we propose the implementation of a power management strategy for a novel low-cost low-power heterogeneous dual-core SoC for IoT edge fabricated in 28 nm FD-SOI technology. Ss with more complex power management policies implemented on high-end application processors, we propose a power management strategy where the power mode is dynamically selected to ensure user-specified target idleness. We demonstrate that the dynamic power mode selection introduced by our power manager allows achieving more than 43% power consumption reduction with respect to static worst-case power mode selection, without any significant penalty in the performance of a running application.

scholarly journals Implementation Basic Network Design with Netkit For Evaluation of Network Learning

2019 ◽  
Vol 15 (08) ◽  
pp. 18
Author(s):  
Yuri Ariyanto ◽  
Budi Harijanto ◽  
Yan Watequlis S.
Keyword(s):  
Network Design ◽  
Network Topology ◽  
Computer Network ◽  
Virtual Laboratory ◽  
Virtual Laboratories ◽  
Network Topologies ◽  
Low Costs ◽  
Network Emulator ◽  
Practical Trial ◽  
Basic Network

A virtual laboratory with a network emulator environment using NetKit is one of series of basic network laboratories on basic computer network competencies where students are given practical trial opportunities at low costs and little effort in their implementation. Teaching computer network subjects to be easily understood by students needs an instructional media as a tool in delivering material. This media uses computer virtualization technology, i.e. creating a virtual laboratory, as a means of students in conducting experiments from the material that has been obtained. In virtual laboratories it is possible to implement network topology designs based on actual network topologies. This implementation is used as a testing tool before the network topology is implemented on the actual network. Therefore, errors can be identified first without disturbing the system that is already running. For testing, the students are given training using a basic network design consisting of the implementation of routing tests, firewalls, ftp server implementation and web server. This paper is aimed at describing ways to develop a virtual laboratory with a network emulator environment using NetKit. Moreover, several exercises on network topology implementation that are applied directly to the real world with NetKit are introduced, such as describing laboratory settings, describing the main parts of the lab, illustrating lab instructions, and reporting lab feeds.

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