scholarly journals Optimization of PFC SEPIC Converter Parameters Design for Minimization of THD and Voltage Ripple

2018 ◽  
Vol 7 (4.30) ◽  
pp. 240 ◽  
Author(s):  
M. K. R. Noor ◽  
A. Ponniran ◽  
M. A. Z. A. Rashid ◽  
A. A. Bakar ◽  
J. N. Jumadril ◽  
...  
Keyword(s):  
Design Optimization ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Switching Frequency ◽  
Unity Power Factor ◽  
Voltage Ripple ◽  
Voltage Variation ◽  
Balancing Energy ◽  
Energy Compensation

This paper discusses the current total harmonic distortion (THDi) and voltage ripple minimization of SEPIC converter based on parameters design optimization. This conventional PFC SEPIC converter is designed to operate in discontinuous conduction mode in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Meanwhile, the ranges of duty cycle for buck and boost operations are between 0<D<0.5 and 0.5<D<1, respectively, for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor. The experimental results show that, the current THD is reduced to 2.66% from 70.9% after optimization process is conducted. Furthermore, it is confirmed that the output voltage ripple frequency is always double from the input line frequency, fL = 2foutand the output voltage ripple is always lower than the maximum input voltage ripple. Therefore, the designed parameters of the experimental converter is confirmed with approximately 65 W of the converter output power.

scholarly journals Optimization of PFC cuk converter parameters design for minimization of THD and voltage ripple

2019 ◽  
Vol 10 (1) ◽  
pp. 514 ◽  
Author(s):  
M. A. Z. A. Rashid ◽  
A. Ponniran ◽  
M. K. R. Noor ◽  
J. N. Jumadril ◽  
M. H. Yatim ◽  
...  
Keyword(s):  
Design Optimization ◽  
Output Voltage ◽  
Input Voltage ◽  
Parameters Optimization ◽  
Switching Frequency ◽  
Cuk Converter ◽  
Voltage Ripple ◽  
Voltage Variation ◽  
Balancing Energy ◽  
Energy Compensation

This paper presents the optimization of PFC Cuk converter parameter design for the minimization of THD and voltage ripple. In this study, the PFC Cuk converter is designed to operate in discontinuous conduction mode (DCM) in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Nevertheless, the ranges of duty cycle for buck and boost operations are 0&lt;D&lt;0.5 and 0.5&lt;D&lt;1, respectively for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor for minimization of THD current. In addition, the selection of high output capacitance will minimize the output voltage ripple significantly. A 65 W PFC Cuk converter prototype is developed and experimentally tested to confirm the parameters design optimization principle. The experimental results show that the THD current is reduced to 4.5% from 61.3% and the output voltage ripple is reduced to 7 V from 18 V after parameters optimization are realized. Furthermore, it is confirmed that the output voltage ripple frequency is always double of the input line frequency, 50 Hz and the output voltage ripple is always lower than the maximum input voltage ripple.

Voltage Ripple Reduction in Voltage Loop of Voltage Source Converter

2017 ◽  
Vol 8 (2) ◽  
pp. 869
Author(s):  
Jedsada Jaroenkiattrai ◽  
Viboon Chunkag
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Input Power ◽  
Input Current ◽  
Voltage Source ◽  
Voltage Source Converter ◽  
Dynamical Response ◽  
Voltage Ripple ◽  
Ripple Reduction

In order to achieve a good dynamical response of a full-bridge AC-DC voltage source converters (VSC). The bandwidth of PI controller must be relatively wide. This leads to the voltage ripple produced in the control signal, as known that its ripple frequency has twice of the line frequency and cause the 3rd harmonic of an input current. A Ripple Voltage Estimator (RVE) algorithm and Feed-Forward Compensation (FFC) algorithm are proposed and added to the conventional control. The RVE algorithm estimated the ripple signal to subtract it occurring in the voltage loop. As a result, the 3rd harmonic of the input current can be reduced, and hence the Total Harmonic Distortion of input current (THDi) are improved.  In addition, the FFC algorithm will offer a better dynamical response of output voltage. The performance evaluation was conducted through the simulation and experiment at 110Vrms/50Hz of the input voltage, with a 600 W load and 250 V<sub>dc</sub> output voltage. The overall system performances are obtained as follows: the power factor at the full load is higher 0.98, the harmonic distortion at AC input power source of the converter is under control in IEC61000-3-2 class A limit, and the overall efficiency is greater than 85%.

scholarly journals The study on the effect of voltage ripple on multiphase buck converters with phase shedding control scheme for SCADA applications

2021 ◽  
Vol 10 (4) ◽  
pp. 1856-1863
Author(s):  
Mini P. Varghese ◽  
A. Manjunatha ◽  
T. V. Snehaprabha
Keyword(s):  
Output Voltage ◽  
Low Voltage ◽  
Input Voltage ◽  
Buck Converter ◽  
Switching Frequency ◽  
Power Sources ◽  
Voltage Regulator Modules ◽  
Voltage Ripple ◽  
Control Scheme ◽  
Enhance Efficiency

Voltage regulator modules (VRM) need to have low output voltage ripple and tight efficiency to power advanced microprocessors. This paper explains a phase shedding technique to enhance efficiency and its impact on output voltage ripple. In this study, analysis was done on a 4-phase buck converter which is having an input voltage of 45-65 V and delivers an output of 9 V, 12A with a switching frequency of 200Khz. The phase shedding control scheme is suitable for applications such as power sources for programmable logic controllers, which is a part of SCADA systems, which requires a low voltage and high current power supply. Working of a multiphase buck converter with phase shedding is modelled and verified using Matlab/Simulink software. The simulation results show the effect of the phase shedding technique on efficiency in varying load conditions and the effect of an increase of the voltage ripple at the output.

scholarly journals Analysis and Implementation of a Frequency Control DC–DC Converter for Light Electric Vehicle Applications

Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1623
Author(s):  
Bor-Ren Lin
Keyword(s):  
Electric Vehicles ◽  
Output Voltage ◽  
Frequency Control ◽  
Input Voltage ◽  
Pulse Frequency ◽  
Switching Frequency ◽  
Battery Charger ◽  
Dc Microgrid ◽  
Load Voltage ◽  
Transportation Vehicle

In order to realize emission-free solutions and clean transportation alternatives, this paper presents a new DC converter with pulse frequency control for a battery charger in electric vehicles (EVs) or light electric vehicles (LEVs). The circuit configuration includes a resonant tank on the high-voltage side and two variable winding sets on the output side to achieve wide output voltage operation for a universal LEV battery charger. The input terminal of the presented converter is a from DC microgrid with voltage levels of 380, 760, or 1500 V for house, industry plant, or DC transportation vehicle demands, respectively. To reduce voltage stresses on active devices, a cascade circuit structure with less voltage rating on power semiconductors is used on the primary side. Two resonant capacitors were selected on the resonant tank, not only to achieve the two input voltage balance problem but also to realize the resonant operation to control load voltage. By using the variable switching frequency approach to regulate load voltage, active switches are turned on with soft switching operation to improve converter efficiency. In order to achieve wide output voltage capability for universal battery charger demands such as scooters, electric motorbikes, Li-ion e-trikes, golf carts, luxury golf cars, and quad applications, two variable winding sets were selected to have a wide voltage output (50~160 V). Finally, experiments with a 1 kW rated prototype were demonstrated to validate the performance and benefits of presented converter.

Compact CMOS Analog Multiplier Free of Voltage Reference Generators

2020 ◽  
Vol 15 (3) ◽  
pp. 1-12
Author(s):  
Ana Isabela Araújo Cunha ◽  
Antonio José Sobrinho De Sousa ◽  
Edson Pinto Santana ◽  
Robson Nunes De Lima ◽  
Fabian Souza De Andrade ◽  
...  
Keyword(s):  
Supply Voltage ◽  
Harmonic Distortion ◽  
Current Mode ◽  
Input Voltage ◽  
Voltage Reference ◽  
Analog Multiplier ◽  
Voltage Range ◽  
Voltage Variation ◽  
Static Power ◽  
Four Quadrant

This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks. For this reason, the circuit has voltage-mode inputs and a current-mode output and the chief design targets are compactness and low energy consumption. A signal application method is proposed that avoids voltage reference generators, which contributes to reduce sensitivity to supply voltage variation. Performance analysis through simulation has been accomplished for a design in CMOS 130 nm technology with 163 µm2 total active area. The circuit features ±50 mV input voltage range, 86 µW static power and ‑28.4 dB maximum total harmonic distortion. A simple technique for manual calibration is also presented.

scholarly journals Design Method of Double-Boost DC/DC Converter with High Voltage Gain for Electric Vehicles

2020 ◽  
Vol 11 (4) ◽  
pp. 64 ◽  
Author(s):  
Zhengxin Liu ◽  
Jiuyu Du ◽  
Boyang Yu
Keyword(s):  
Electric Vehicles ◽  
High Voltage ◽  
Direct Current ◽  
Output Voltage ◽  
Input Voltage ◽  
Maximum Efficiency ◽  
Voltage Gain ◽  
Current Feedback ◽  
Voltage Ripple ◽  
High Voltage Gain

Direct current to direct current (DC/DC) converters are required to have higher voltage gains in some applications for electric vehicles, high-voltage level charging systems and fuel cell electric vehicles. Therefore, it is greatly important to carry out research on high voltage gain DC/DC converters. To improve the efficiency of high voltage gain DC/DC converters and solve the problems of output voltage ripple and robustness, this paper proposes a double-boost DC/DC converter. Based on the small-signal model of the proposed converter, a double closed-loop controller with voltage–current feedback and input voltage feedforward is designed. The experimental results show that the maximum efficiency of the proposed converter exceeds 95%, and the output voltage ripple factor is 0.01. Compared with the traditional boost converter and multi-phase interleaved DC/DC converter, the proposed topology has certain advantages in terms of voltage gain, device stress, number of devices, and application of control algorithms.

scholarly journals Induction Motor Drives Fed by an NPC Inverter with Unbalanced DC-Link

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1379 ◽  
Author(s):  
Umberto Abronzini ◽  
Ciro Attaianese ◽  
Matilde D’Arpino ◽  
Mauro Di Monaco ◽  
Giuseppe Tomasso
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Voltage Regulation ◽  
Motor Drives ◽  
Operating Conditions ◽  
Switching Frequency ◽  
Voltage Level ◽  
Voltage Quality ◽  
Vector Modulation

Neutral Point Clamped (NPC) converters with n levels are traditionally controlled in such a way that the DC-link capacitors operate at 1/( n - 1) of the total DC-link voltage level. The voltage level across the DC-link capacitors has to be properly regulated by the capacitor unbalance control to contain the harmonic distortion of the converter output voltages. State-of-the-art modulation techniques address the problem of the DC-link voltage regulation for NPC inverters. However, they highly show reduced performance when unbalanced DC-link voltages are considered. In this paper, a novel Space Vector Modulation (SVM) is proposed for NPC converters with an unbalanced DC-link. At every modulation interval, the technique defines the optimal switching pattern by considering the actual unbalanced DC-link conditions. The proposed modulation allows improving the harmonic content of the NPC converter output voltage with respect to a traditional ML-SVM, when the same operating conditions are considered. As an extension, the proposed modulation technique will guarantee the same output voltage quality of a traditional ML-SVM with unbalanced DC-link, while improving the conversion efficiency thanks to a reduction of switching frequency.

scholarly journals Power Factor Corrector Based on Parallel Quasi- Resonant Pulse Converter with Fast Current Loop

2013 ◽  
Vol 3 (1) ◽  
pp. 5-11 ◽  
Author(s):  
Yuriy Denisov ◽  
Serhii Stepenko
Keyword(s):  
Power Factor ◽  
High Efficiency ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Current Loop ◽  
Switching Frequency ◽  
Zero Current Switching ◽  
High Switching Frequency ◽  
Power Factor Corrector ◽  
Pulse Converter

Abstract The problems, devoted to power quality and particularly power factor correction, are of great importance nowadays. The key requirements, which should be satisfied according to the energy efficiency paradigm, are not limited only by high quality of the output voltage (low total harmonic distortion), but also assume minimal power losses (high efficiency) in the power factor corrector (PFC). It could be satisfied by the use of quasi-resonant pulse converter (QRPC) due to its high efficiency at high switching frequency instead of the classical pulse-width modulated (PWM) boost converter. A dynamic model of QRPC with zero current switching (ZCS) is proposed. This model takes into account the main features of QRPC-ZCS as a link of a PFC closed-loop system (discreteness, sharp changes of parameters over switching period, input voltage impact on the gain). The synthesized model is also valid for conventional parallel pulse converter over an active interval of commutation. The regulator for current loop of PFC was synthesized based on digital filter using proposed model by the criterion of fast acting.

Research on the High Frequency Realization of High-Power Inverter

2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang
Keyword(s):  
High Power ◽  
High Frequency ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Soft Switching ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Switching Losses ◽  
Simulation And Experiment

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.

scholarly journals Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

2020 ◽  
Vol 9 (5) ◽  
pp. 860-866
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Frequency ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
High Switching Frequency

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

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