scholarly journals The study on the effect of voltage ripple on multiphase buck converters with phase shedding control scheme for SCADA applications

2021 ◽  
Vol 10 (4) ◽  
pp. 1856-1863
Author(s):  
Mini P. Varghese ◽  
A. Manjunatha ◽  
T. V. Snehaprabha

Voltage regulator modules (VRM) need to have low output voltage ripple and tight efficiency to power advanced microprocessors. This paper explains a phase shedding technique to enhance efficiency and its impact on output voltage ripple. In this study, analysis was done on a 4-phase buck converter which is having an input voltage of 45-65 V and delivers an output of 9 V, 12A with a switching frequency of 200Khz. The phase shedding control scheme is suitable for applications such as power sources for programmable logic controllers, which is a part of SCADA systems, which requires a low voltage and high current power supply. Working of a multiphase buck converter with phase shedding is modelled and verified using Matlab/Simulink software. The simulation results show the effect of the phase shedding technique on efficiency in varying load conditions and the effect of an increase of the voltage ripple at the output.

2018 ◽  
Vol 7 (4.30) ◽  
pp. 240 ◽  
Author(s):  
M. K. R. Noor ◽  
A. Ponniran ◽  
M. A. Z. A. Rashid ◽  
A. A. Bakar ◽  
J. N. Jumadril ◽  
...  

This paper discusses the current total harmonic distortion (THDi) and voltage ripple minimization of SEPIC converter based on parameters design optimization. This conventional PFC SEPIC converter is designed to operate in discontinuous conduction mode in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Meanwhile, the ranges of duty cycle for buck and boost operations are between 0<D<0.5 and 0.5<D<1, respectively, for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor. The experimental results show that, the current THD is reduced to 2.66% from 70.9% after optimization process is conducted. Furthermore, it is confirmed that the output voltage ripple frequency is always double from the input line frequency, fL = 2foutand the output voltage ripple is always lower than the maximum input voltage ripple. Therefore, the designed parameters of the experimental converter is confirmed with approximately 65 W of the converter output power.


Author(s):  
M. A. Z. A. Rashid ◽  
A. Ponniran ◽  
M. K. R. Noor ◽  
J. N. Jumadril ◽  
M. H. Yatim ◽  
...  

This paper presents the optimization of PFC Cuk converter parameter design for the minimization of THD and voltage ripple. In this study, the PFC Cuk converter is designed to operate in discontinuous conduction mode (DCM) in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Nevertheless, the ranges of duty cycle for buck and boost operations are 0&lt;D&lt;0.5 and 0.5&lt;D&lt;1, respectively for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor for minimization of THD current. In addition, the selection of high output capacitance will minimize the output voltage ripple significantly. A 65 W PFC Cuk converter prototype is developed and experimentally tested to confirm the parameters design optimization principle. The experimental results show that the THD current is reduced to 4.5% from 61.3% and the output voltage ripple is reduced to 7 V from 18 V after parameters optimization are realized. Furthermore, it is confirmed that the output voltage ripple frequency is always double of the input line frequency, 50 Hz and the output voltage ripple is always lower than the maximum input voltage ripple.


Energies ◽  
2021 ◽  
Vol 14 (18) ◽  
pp. 5911
Author(s):  
Hsiao-Hsing Chou ◽  
Hsin-Liang Chen

This paper presents a buck converter with a novel constant frequency controlled technique, which employs the proposed frequency detector and adaptive on-time control (AOT) logic to lock the switching frequency. The control scheme, design concept, and circuit realization are presented. In contrast to a complex phase lock loop (PLL), the proposed scheme is easy to implement. With this novel technique, a buck converter is designed to produce an output voltage of 1.0–2.5 V at the input voltage of 3.0–3.6 V and the maximum load current of 500 mA. The proposed scheme was verified using SIMPLIS and MathCAD. The simulation results show that the switching frequency variation is less than 1% at an output voltage of 1.0–2.5 V. Furthermore, the recovery time is less than 2 μs for a step-up and step-down load transient. The circuit will be fabricated using UMC 0.18 μm 1P6M CMOS processes. The control scheme, design concept and circuit realization are presented in this paper.


2019 ◽  
Vol 29 (01) ◽  
pp. 2050013
Author(s):  
Najmeh Cheraghi Shirazi ◽  
Abumoslem Jannesari ◽  
Pooya Torkzadeh

A new self-start-up switched-capacitor charge pump is proposed for low-power, low-voltage and battery-less implantable applications. To minimize output voltage ripple and improve transient response, interleaving regulation technique is applied to a multi-stage Cross-Coupled Charge Pump (CCCP) circuit. It splits the power flow in a time-sequenced manner. Three cases of study are designed and investigated with body-biasing technique by auxiliary transistors: Four-stage Two-Branch CCCP (TBCCCP), the two-cell four-stage Interleaved Two-Branch CCCP (ITBCCCP2) and four-cell four-stage Interleaved Two-Branch CCCP (ITBCCCP4). Multi-phase nonoverlap clock generator circuit with body-biasing technique is also proposed which can operate at voltages as low as CCCP circuits. The proposed circuits are designed with input voltage as low as 300 to 400[Formula: see text]mV and 20[Formula: see text]MHz clock frequency for 1[Formula: see text]pF load capacitance. Among the three designs, ITBCCCP4 has the lowest ramp-up time (41.6% faster), output voltage ripple (29% less) and power consumption (19% less). The Figure-Of-Merit (FOM) of ITBCCCP4 is the highest value among two others. For 400[Formula: see text]mV input voltage, ITBCCCP4 has a 98.3% pumping efficiency within 11.6[Formula: see text][Formula: see text]s, while having a maximum voltage ripple of 0.1% and a power consumption as low as 2.7[Formula: see text]nW. The FOM is 0.66 for this circuit. The designed circuits are implemented in 180-nm standard CMOS technology with an effective chip area of [Formula: see text][Formula: see text][Formula: see text]m for TBCCCP, [Formula: see text][Formula: see text][Formula: see text]m for ITBCCCP2 and [Formula: see text][Formula: see text][Formula: see text]m for ITBCCCP4.


Author(s):  
Mahajan Sagar Bhaskar ◽  
Sanjeevikumar Padmanaban ◽  
Frede Blaabjerg

This article presents a self balanced multistage DC-DC step-up converter for photovoltaic applications. Proposed converter topology is designed for unidirectional power transfer and provides a doable solution for photovoltaic applications where voltage is required to be stepped up without magnetic components (Transformer-less and Inductor-less). The output voltage obtained from renewable sources will be low and must be stepped up by using a DC-DC converter for photovoltaic applications. K diodes and K capacitors along with two semiconductor control switch are used in the K-stage proposed converter to obtain an output voltage which is (K+1) times the input voltage. The conspicuous features of proposed topology are i) Magnetic components free (Transformer-less and Inductor-less). ii) Continuous input current iii) Low voltage rating semiconductor devices and capacitors iv) Modularity v) Easy to add a higher number of levels to increase voltage gain vi) Only two control switches with alternating operation and simple control. The proposed converter is compared with recent existing transformer-less and Inductor-less power converter in term of voltage gain, number of devices and cost. The application of proposed circuit is discussed in detail. The proposed converter has been designed with rated power of 60W, input voltage is 24V, output voltage is 100V and switching frequency is 100 kHz. The performance of the converter is verified through experimental and simulation results.


Author(s):  
Mahajan Sagar Bhaskar ◽  
Sanjeevikumar Padmanaban ◽  
Frede Blaabjerg

This article presents a self balanced multistage DC-DC step-up converter for photovoltaic applications. Proposed converter topology is designed for unidirectional power transfer and provides a doable solution for photovoltaic applications where voltage is required to be stepped up without magnetic components. The output voltage obtained from renewable sources will be low and must be stepped up by using a DC-DC converter for photovoltaic applications. (2K-2) diodes and (2K-2) capacitors along with two semiconductor switch are used in the proposed converter to obtain an output voltage which is (K+1) times the input voltage. The conspicuous features of proposed topology are i) Magnetic components free ii) Continuous input current iii) Low voltage rating semiconductor devices and capacitors iv) Modularity v) Easy to add a higher number of levels to increase voltage gain vi) Only two control switches with alternating operation and simple control. The proposed converter has been designed with rated power of 60W, input voltage is 24V, output voltage is 100V and switching frequency is 100 kHz. The performance of the converter is verified through experimental and simulation results.


Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1623
Author(s):  
Bor-Ren Lin

In order to realize emission-free solutions and clean transportation alternatives, this paper presents a new DC converter with pulse frequency control for a battery charger in electric vehicles (EVs) or light electric vehicles (LEVs). The circuit configuration includes a resonant tank on the high-voltage side and two variable winding sets on the output side to achieve wide output voltage operation for a universal LEV battery charger. The input terminal of the presented converter is a from DC microgrid with voltage levels of 380, 760, or 1500 V for house, industry plant, or DC transportation vehicle demands, respectively. To reduce voltage stresses on active devices, a cascade circuit structure with less voltage rating on power semiconductors is used on the primary side. Two resonant capacitors were selected on the resonant tank, not only to achieve the two input voltage balance problem but also to realize the resonant operation to control load voltage. By using the variable switching frequency approach to regulate load voltage, active switches are turned on with soft switching operation to improve converter efficiency. In order to achieve wide output voltage capability for universal battery charger demands such as scooters, electric motorbikes, Li-ion e-trikes, golf carts, luxury golf cars, and quad applications, two variable winding sets were selected to have a wide voltage output (50~160 V). Finally, experiments with a 1 kW rated prototype were demonstrated to validate the performance and benefits of presented converter.


Author(s):  
Mamidala Hemanth Reddy

The output voltage from the sustainable energy like photovoltaic (PV) arrays and fuel cells will be at less amount of level. This must be boost considerably for practical utilization or grid connection. A conventional boost converter will provides low voltage gain while Quadratic boost converter (QBC) provides high voltage gain. QBC is able to regulate the output voltage and the choice of second inductor can give its current as positive and whereas for boost increases in the voltage will not able to regulate the output voltage. It has low semiconductor device voltage stress and switch usage factor is high. Analysis and design modeling of Quadratic boost converter is proposed in this paper. A power with 50 W is developed with 18 V input voltage and yield 70 V output voltage and the outcomes are approved through recreation utilizing MATLAB/SIMULINK MODEL.


Author(s):  
Suwarno Suwarno ◽  
Tole Sutikno

<p>This paper presents the implementation of the buck-boost converter design which is a power electronics applications that can stabilize voltage, even though the input voltage changes. Regulator to stabilize the voltage using PWM pulse that triger pin 2 on XL6009. In this design of buck-boost converter is implemented using the XL6009, LM7815 and TIP2955. LM7815 as output voltage regulator at 15V with 1A output current, while TIP2955 is able to overcome output current up to 5A. When the LM7815 and TIP2955 are connected in parallel, the converter can increase the output current to 6A.. Testing is done using varied voltage sources that can be set. The results obtained from this design can be applied to PV (Photovoltaic) and WP (Wind Power), with changes in input voltage between 3-21V dc can produce output voltage 15V.</p>


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